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[gdb/testsuite] Fix gdb.fortran/nested-funcs-2.exp with gdbserver
[deliverable/binutils-gdb.git]
/
opcodes
/
mep-opc.h
diff --git
a/opcodes/mep-opc.h
b/opcodes/mep-opc.h
index 0704c3001a7727e1e004f13353366d1ff4f1ae01..429063aa26144c66b299b6734069b90332c0f0e7 100644
(file)
--- a/
opcodes/mep-opc.h
+++ b/
opcodes/mep-opc.h
@@
-1,8
+1,9
@@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.
/* Instruction opcode header for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright
1996-2007
Free Software Foundation, Inc.
+Copyright
(C) 1996-2020
Free Software Foundation, Inc.
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
@@
-25,6
+26,10
@@
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
#ifndef MEP_OPC_H
#define MEP_OPC_H
#ifndef MEP_OPC_H
#define MEP_OPC_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* -- opc.h */
#undef CGEN_DIS_HASH_SIZE
/* -- opc.h */
#undef CGEN_DIS_HASH_SIZE
@@
-87,7
+92,7
@@
extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask;
)
/* A mask for all ISAs executed by a VLIW coprocessor. */
)
/* A mask for all ISAs executed by a VLIW coprocessor. */
-#define MEP_ALL_COP_ISAS_MASK mep_all_cop_isas_mask
+#define MEP_ALL_COP_ISAS_MASK mep_all_cop_isas_mask
extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask;
#define MEP_INSN_COP_P(insn) ( \
extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask;
#define MEP_INSN_COP_P(insn) ( \
@@
-96,6
+101,7
@@
extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask;
)
extern int mep_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
)
extern int mep_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
+extern int mep_cgen_insn_supported_asm (CGEN_CPU_DESC, const CGEN_INSN *);
/* -- asm.c */
/* Enum declaration for mep instruction types. */
/* -- asm.c */
/* Enum declaration for mep instruction types. */
@@
-484,6
+490,8
@@
struct cgen_fields
long f_ivc2_3u25;
long f_ivc2_imm16p0;
long f_ivc2_simm16p0;
long f_ivc2_3u25;
long f_ivc2_imm16p0;
long f_ivc2_simm16p0;
+ long f_ivc2_ccrn_c3hi;
+ long f_ivc2_ccrn_c3lo;
long f_ivc2_crn;
long f_ivc2_crm;
long f_ivc2_ccrn_h1;
long f_ivc2_crn;
long f_ivc2_crm;
long f_ivc2_ccrn_h1;
@@
-492,6
+500,7
@@
struct cgen_fields
long f_ivc2_cmov1;
long f_ivc2_cmov2;
long f_ivc2_cmov3;
long f_ivc2_cmov1;
long f_ivc2_cmov2;
long f_ivc2_cmov3;
+ long f_ivc2_ccrn_c3;
long f_ivc2_ccrn;
long f_ivc2_crnx;
};
long f_ivc2_ccrn;
long f_ivc2_crnx;
};
@@
-510,4
+519,8
@@
struct cgen_fields
}
}
+ #ifdef __cplusplus
+ }
+ #endif
+
#endif /* MEP_OPC_H */
#endif /* MEP_OPC_H */
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