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arc: Don't generate dynamic relocation for non SEC_ALLOC sections
[deliverable/binutils-gdb.git]
/
opcodes
/
mips-dis.c
diff --git
a/opcodes/mips-dis.c
b/opcodes/mips-dis.c
index 0dc437ede475fbe5d73491771becc4d45dba8ad5..755bbe294bdbf3ff1974b63eae56820f7c9593d2 100644
(file)
--- a/
opcodes/mips-dis.c
+++ b/
opcodes/mips-dis.c
@@
-1,5
+1,5
@@
/* Print mips instructions for GDB, the GNU debugger, or for objdump.
/* Print mips instructions for GDB, the GNU debugger, or for objdump.
- Copyright (C) 1989-20
19
Free Software Foundation, Inc.
+ Copyright (C) 1989-20
20
Free Software Foundation, Inc.
Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
This file is part of the GNU opcodes library.
Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
This file is part of the GNU opcodes library.
@@
-24,6
+24,9
@@
#include "libiberty.h"
#include "opcode/mips.h"
#include "opintl.h"
#include "libiberty.h"
#include "opcode/mips.h"
#include "opintl.h"
+#include "elf-bfd.h"
+#include "elf/mips.h"
+#include "elfxx-mips.h"
/* FIXME: These are needed to figure out if the code is mips16 or
not. The low bit of the address is often a good indicator. No
/* FIXME: These are needed to figure out if the code is mips16 or
not. The low bit of the address is often a good indicator. No
@@
-32,8
+35,6
@@
#if !defined(EMBEDDED_ENV)
#define SYMTAB_AVAILABLE 1
#if !defined(EMBEDDED_ENV)
#define SYMTAB_AVAILABLE 1
-#include "elf-bfd.h"
-#include "elf/mips.h"
#endif
/* Mips instructions are at maximum this many bytes long. */
#endif
/* Mips instructions are at maximum this many bytes long. */
@@
-829,7
+830,7
@@
mips_convert_abiflags_ases (unsigned long afl_ases)
/* Calculate combination ASE flags from regular ASE flags. */
static unsigned long
/* Calculate combination ASE flags from regular ASE flags. */
static unsigned long
-mips_calculate_combination_ases (unsigned long opcode_ases)
+mips_calculate_combination_ases (
int opcode_isa,
unsigned long opcode_ases)
{
unsigned long combination_ases = 0;
{
unsigned long combination_ases = 0;
@@
-837,6
+838,10
@@
mips_calculate_combination_ases (unsigned long opcode_ases)
combination_ases |= ASE_XPA_VIRT;
if ((opcode_ases & (ASE_MIPS16E2 | ASE_MT)) == (ASE_MIPS16E2 | ASE_MT))
combination_ases |= ASE_MIPS16E2_MT;
combination_ases |= ASE_XPA_VIRT;
if ((opcode_ases & (ASE_MIPS16E2 | ASE_MT)) == (ASE_MIPS16E2 | ASE_MT))
combination_ases |= ASE_MIPS16E2_MT;
+ if ((opcode_ases & ASE_EVA)
+ && ((opcode_isa & INSN_ISA_MASK) == ISA_MIPS64R6
+ || (opcode_isa & INSN_ISA_MASK) == ISA_MIPS32R6))
+ combination_ases |= ASE_EVA_R6;
return combination_ases;
}
return combination_ases;
}
@@
-909,7
+914,7
@@
set_default_mips_dis_options (struct disassemble_info *info)
mips_ase |= ASE_MDMX;
}
#endif
mips_ase |= ASE_MDMX;
}
#endif
- mips_ase |= mips_calculate_combination_ases (mips_ase);
+ mips_ase |= mips_calculate_combination_ases (mips_
isa, mips_
ase);
}
/* Parse an ASE disassembler option and set the corresponding global
}
/* Parse an ASE disassembler option and set the corresponding global
@@
-997,7
+1002,7
@@
parse_mips_dis_option (const char *option, unsigned int len)
if (parse_mips_ase_option (option))
{
if (parse_mips_ase_option (option))
{
- mips_ase |= mips_calculate_combination_ases (mips_ase);
+ mips_ase |= mips_calculate_combination_ases (mips_
isa, mips_
ase);
return;
}
return;
}
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