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PR gold/14566
[deliverable/binutils-gdb.git]
/
opcodes
/
openrisc-ibld.c
diff --git
a/opcodes/openrisc-ibld.c
b/opcodes/openrisc-ibld.c
index b5e59624c1c375f67cafce25fb9a84c4202e3d1d..6a84f327515962e229d2fa94c6daf1a37c52f6ad 100644
(file)
--- a/
opcodes/openrisc-ibld.c
+++ b/
opcodes/openrisc-ibld.c
@@
-3,8
+3,8
@@
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006, 2007
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006, 2007
,
+
2008, 2010
Free Software Foundation, Inc.
This file is part of libopcodes.
This file is part of libopcodes.
@@
-33,6
+33,7
@@
#include "symcat.h"
#include "openrisc-desc.h"
#include "openrisc-opc.h"
#include "symcat.h"
#include "openrisc-desc.h"
#include "openrisc-opc.h"
+#include "cgen/basic-modes.h"
#include "opintl.h"
#include "safe-ctype.h"
#include "opintl.h"
#include "safe-ctype.h"
@@
-137,7
+138,7
@@
insert_normal (CGEN_CPU_DESC cd,
if (length == 0)
return NULL;
if (length == 0)
return NULL;
- if (word_length >
32
)
+ if (word_length >
8 * sizeof (CGEN_INSN_INT)
)
abort ();
/* For architectures with insns smaller than the base-insn-bitsize,
abort ();
/* For architectures with insns smaller than the base-insn-bitsize,
@@
-441,7
+442,7
@@
extract_normal (CGEN_CPU_DESC cd,
return 1;
}
return 1;
}
- if (word_length >
32
)
+ if (word_length >
8 * sizeof (CGEN_INSN_INT)
)
abort ();
/* For architectures with insns smaller than the insn-base-bitsize,
abort ();
/* For architectures with insns smaller than the insn-base-bitsize,
@@
-468,7
+469,7
@@
extract_normal (CGEN_CPU_DESC cd,
{
unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
{
unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
- if (word_length >
32
)
+ if (word_length >
8 * sizeof (CGEN_INSN_INT)
)
abort ();
if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
abort ();
if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
@@
-568,14
+569,14
@@
openrisc_cgen_insert_operand (CGEN_CPU_DESC cd,
case OPENRISC_OPERAND_ABS_26 :
{
long value = fields->f_abs26;
case OPENRISC_OPERAND_ABS_26 :
{
long value = fields->f_abs26;
- value = ((
unsigned int
) (pc) >> (2));
+ value = ((
SI
) (pc) >> (2));
errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_ABS_ADDR), 0, 25, 26, 32, total_length, buffer);
}
break;
case OPENRISC_OPERAND_DISP_26 :
{
long value = fields->f_disp26;
errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_ABS_ADDR), 0, 25, 26, 32, total_length, buffer);
}
break;
case OPENRISC_OPERAND_DISP_26 :
{
long value = fields->f_disp26;
- value = ((
int
) (((value) - (pc))) >> (2));
+ value = ((
SI
) (((value) - (pc))) >> (2));
errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer);
}
break;
errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer);
}
break;
@@
-606,7
+607,7
@@
openrisc_cgen_insert_operand (CGEN_CPU_DESC cd,
case OPENRISC_OPERAND_UI16NC :
{
{
case OPENRISC_OPERAND_UI16NC :
{
{
- FLD (f_i16_2) = ((((
unsigned int
) (FLD (f_i16nc)) >> (11))) & (31));
+ FLD (f_i16_2) = ((((
HI
) (FLD (f_i16nc)) >> (11))) & (31));
FLD (f_i16_1) = ((FLD (f_i16nc)) & (2047));
}
errmsg = insert_normal (cd, fields->f_i16_1, 0, 0, 10, 11, 32, total_length, buffer);
FLD (f_i16_1) = ((FLD (f_i16nc)) & (2047));
}
errmsg = insert_normal (cd, fields->f_i16_1, 0, 0, 10, 11, 32, total_length, buffer);
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