+static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
+ ppc_cpu_t);
+
+struct dis_private
+{
+ /* Stash the result of parsing disassembler_options here. */
+ ppc_cpu_t dialect;
+} private;
+
+#define POWERPC_DIALECT(INFO) \
+ (((struct dis_private *) ((INFO)->private_data))->dialect)
+
+struct ppc_mopt {
+ const char *opt;
+ ppc_cpu_t cpu;
+ ppc_cpu_t sticky;
+};
+
+struct ppc_mopt ppc_opts[] = {
+ { "403", (PPC_OPCODE_PPC | PPC_OPCODE_403),
+ 0 },
+ { "405", (PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405),
+ 0 },
+ { "440", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
+ | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
+ 0 },
+ { "464", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
+ | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
+ 0 },
+ { "476", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_440
+ | PPC_OPCODE_476 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
+ 0 },
+ { "601", (PPC_OPCODE_PPC | PPC_OPCODE_601),
+ 0 },
+ { "603", (PPC_OPCODE_PPC),
+ 0 },
+ { "604", (PPC_OPCODE_PPC),
+ 0 },
+ { "620", (PPC_OPCODE_PPC | PPC_OPCODE_64),
+ 0 },
+ { "7400", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
+ 0 },
+ { "7410", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
+ 0 },
+ { "7450", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
+ 0 },
+ { "7455", (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
+ 0 },
+ { "750cl", (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
+ , 0 },
+ { "a2", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK | PPC_OPCODE_64
+ | PPC_OPCODE_A2),
+ 0 },
+ { "altivec", (PPC_OPCODE_PPC),
+ PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 },
+ { "any", 0,
+ PPC_OPCODE_ANY },
+ { "booke", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
+ 0 },
+ { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
+ 0 },
+ { "cell", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
+ 0 },
+ { "com", (PPC_OPCODE_COMMON),
+ 0 },
+ { "e300", (PPC_OPCODE_PPC | PPC_OPCODE_E300),
+ 0 },
+ { "e500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
+ | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500),
+ 0 },
+ { "e500mc", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500MC),
+ 0 },
+ { "e500mc64", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
+ | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
+ 0 },
+ { "e5500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7),
+ 0 },
+ { "e6500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
+ | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
+ 0 },
+ { "e500x2", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
+ | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500),
+ 0 },
+ { "efs", (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
+ 0 },
+ { "power4", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
+ 0 },
+ { "power5", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5),
+ 0 },
+ { "power6", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
+ 0 },
+ { "power7", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
+ 0 },
+ { "ppc", (PPC_OPCODE_PPC),
+ 0 },
+ { "ppc32", (PPC_OPCODE_PPC),
+ 0 },
+ { "ppc64", (PPC_OPCODE_PPC | PPC_OPCODE_64),
+ 0 },
+ { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE),
+ 0 },
+ { "ppcps", (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
+ 0 },
+ { "pwr", (PPC_OPCODE_POWER),
+ 0 },
+ { "pwr2", (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
+ 0 },
+ { "pwr4", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
+ 0 },
+ { "pwr5", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5),
+ 0 },
+ { "pwr5x", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5),
+ 0 },
+ { "pwr6", (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
+ 0 },
+ { "pwr7", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
+ 0 },
+ { "pwrx", (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
+ 0 },
+ { "spe", (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
+ PPC_OPCODE_SPE },
+ { "titan", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
+ | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
+ 0 },
+ { "vle", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_VLE),
+ PPC_OPCODE_VLE },
+ { "vsx", (PPC_OPCODE_PPC),
+ PPC_OPCODE_VSX },
+};
+
+/* Switch between Booke and VLE dialects for interlinked dumps. */
+static ppc_cpu_t
+get_powerpc_dialect (struct disassemble_info *info)
+{
+ ppc_cpu_t dialect = 0;
+
+ dialect = POWERPC_DIALECT (info);
+
+ /* Disassemble according to the section headers flags for VLE-mode. */
+ if (dialect & PPC_OPCODE_VLE
+ && info->section->owner != NULL
+ && bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour
+ && elf_object_id (info->section->owner) == PPC32_ELF_DATA
+ && (elf_section_flags (info->section) & SHF_PPC_VLE) != 0)
+ return dialect;
+ else
+ return dialect & ~ PPC_OPCODE_VLE;
+}
+
+/* Handle -m and -M options that set cpu type, and .machine arg. */
+
+ppc_cpu_t
+ppc_parse_cpu (ppc_cpu_t ppc_cpu, ppc_cpu_t *sticky, const char *arg)
+{
+ unsigned int i;
+
+ for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
+ if (strcmp (ppc_opts[i].opt, arg) == 0)
+ {
+ if (ppc_opts[i].sticky)
+ {
+ *sticky |= ppc_opts[i].sticky;
+ if ((ppc_cpu & ~*sticky) != 0)
+ break;
+ }
+ ppc_cpu = ppc_opts[i].cpu;
+ break;
+ }
+ if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
+ return 0;
+
+ ppc_cpu |= *sticky;
+ return ppc_cpu;
+}
+
+/* Determine which set of machines to disassemble for. */
+
+static void
+powerpc_init_dialect (struct disassemble_info *info)
+{
+ ppc_cpu_t dialect = 0;
+ ppc_cpu_t sticky = 0;
+ char *arg;
+ struct dis_private *priv = calloc (sizeof (*priv), 1);
+
+ if (priv == NULL)
+ priv = &private;
+
+ switch (info->mach)
+ {
+ case bfd_mach_ppc_403:
+ case bfd_mach_ppc_403gc:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_403);
+ break;
+ case bfd_mach_ppc_405:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405);
+ break;
+ case bfd_mach_ppc_601:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_601);
+ break;
+ case bfd_mach_ppc_a35:
+ case bfd_mach_ppc_rs64ii:
+ case bfd_mach_ppc_rs64iii:
+ dialect = (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_64);
+ break;
+ case bfd_mach_ppc_e500:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
+ | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500);
+ break;
+ case bfd_mach_ppc_e500mc:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500MC);
+ break;
+ case bfd_mach_ppc_e500mc64:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
+ | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7);
+ break;
+ case bfd_mach_ppc_e5500:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7);
+ break;
+ case bfd_mach_ppc_e6500:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+ | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+ | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
+ | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7);
+ break;
+ case bfd_mach_ppc_titan:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
+ | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN);
+ break;
+ case bfd_mach_ppc_vle:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_VLE);
+ break;
+ default:
+ dialect = (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
+ | PPC_OPCODE_ANY);
+ }
+
+ arg = info->disassembler_options;
+ while (arg != NULL)
+ {
+ ppc_cpu_t new_cpu = 0;
+ char *end = strchr (arg, ',');
+
+ if (end != NULL)
+ *end = 0;
+
+ if ((new_cpu = ppc_parse_cpu (dialect, &sticky, arg)) != 0)
+ dialect = new_cpu;
+ else if (strcmp (arg, "32") == 0)
+ dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
+ else if (strcmp (arg, "64") == 0)
+ dialect |= PPC_OPCODE_64;
+ else
+ fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
+
+ if (end != NULL)
+ *end++ = ',';
+ arg = end;
+ }
+
+ info->private_data = priv;
+ POWERPC_DIALECT(info) = dialect;
+}
+
+#define PPC_OPCD_SEGS 64
+static unsigned short powerpc_opcd_indices[PPC_OPCD_SEGS+1];
+#define VLE_OPCD_SEGS 32
+static unsigned short vle_opcd_indices[VLE_OPCD_SEGS+1];
+
+/* Calculate opcode table indices to speed up disassembly,
+ and init dialect. */
+
+void
+disassemble_init_powerpc (struct disassemble_info *info)
+{
+ int i;
+ unsigned short last;
+
+ i = powerpc_num_opcodes;
+ while (--i >= 0)
+ {
+ unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
+
+ powerpc_opcd_indices[op] = i;
+ }
+
+ last = powerpc_num_opcodes;
+ for (i = PPC_OPCD_SEGS; i > 0; --i)
+ {
+ if (powerpc_opcd_indices[i] == 0)
+ powerpc_opcd_indices[i] = last;
+ last = powerpc_opcd_indices[i];
+ }
+
+ i = vle_num_opcodes;
+ while (--i >= 0)
+ {
+ unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
+ unsigned seg = VLE_OP_TO_SEG (op);
+
+ vle_opcd_indices[seg] = i;
+ }
+
+ last = vle_num_opcodes;
+ for (i = VLE_OPCD_SEGS; i > 0; --i)
+ {
+ if (vle_opcd_indices[i] == 0)
+ vle_opcd_indices[i] = last;
+ last = vle_opcd_indices[i];
+ }