-{ "efscfui", VX(4, 720), VX_MASK, PPCEFS, { RD, RB } },
-{ "efsctuiz", VX(4, 728), VX_MASK, PPCEFS, { RD, RB } },
-{ "efscfsi", VX(4, 721), VX_MASK, PPCEFS, { RD, RB } },
-{ "efscfuf", VX(4, 722), VX_MASK, PPCEFS, { RD, RB } },
-{ "efscfsf", VX(4, 723), VX_MASK, PPCEFS, { RD, RB } },
-{ "efsctui", VX(4, 724), VX_MASK, PPCEFS, { RD, RB } },
-{ "efsctsi", VX(4, 725), VX_MASK, PPCEFS, { RD, RB } },
-{ "efsctsiz", VX(4, 730), VX_MASK, PPCEFS, { RD, RB } },
-{ "efsctuf", VX(4, 726), VX_MASK, PPCEFS, { RD, RB } },
-{ "efsctsf", VX(4, 727), VX_MASK, PPCEFS, { RD, RB } },
-
-{ "evsabs", VX(4, 708), VX_MASK, PPCSPE, { RD, RA } },
-{ "evsnabs", VX(4, 709), VX_MASK, PPCSPE, { RD, RA } },
-{ "evsneg", VX(4, 710), VX_MASK, PPCSPE, { RD, RA } },
-{ "evsadd", VX(4, 704), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evssub", VX(4, 705), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evsmul", VX(4, 712), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evsdiv", VX(4, 713), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evscmpgt", VX(4, 716), VX_MASK, PPCSPE, { CRFD, RA, RB } },
-{ "evsgmplt", VX(4, 717), VX_MASK, PPCSPE, { CRFD, RA, RB } },
-{ "evsgmpeq", VX(4, 718), VX_MASK, PPCSPE, { CRFD, RA, RB } },
-{ "evststgt", VX(4, 732), VX_MASK, PPCSPE, { CRFD, RA, RB } },
-{ "evststlt", VX(4, 733), VX_MASK, PPCSPE, { CRFD, RA, RB } },
-{ "evststeq", VX(4, 734), VX_MASK, PPCSPE, { CRFD, RA, RB } },
-{ "evscfui", VX(4, 720), VX_MASK, PPCSPE, { RD, RB } },
-{ "evscfsi", VX(4, 721), VX_MASK, PPCSPE, { RD, RB } },
-{ "evscfuf", VX(4, 722), VX_MASK, PPCSPE, { RD, RB } },
-{ "evscfsf", VX(4, 723), VX_MASK, PPCSPE, { RD, RB } },
-{ "evsctui", VX(4, 724), VX_MASK, PPCSPE, { RD, RB } },
-{ "evsctuiz", VX(4, 728), VX_MASK, PPCSPE, { RD, RB } },
-{ "evsctsi", VX(4, 725), VX_MASK, PPCSPE, { RD, RB } },
-{ "evsctsiz", VX(4, 730), VX_MASK, PPCSPE, { RD, RB } },
-{ "evsctuf", VX(4, 726), VX_MASK, PPCSPE, { RD, RB } },
-{ "evsctsf", VX(4, 727), VX_MASK, PPCSPE, { RD, RB } },
-
-{ "evmhossf", VX(4, 1031), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhossfa", VX(4, 1063), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhosmf", VX(4, 1039), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhosmfa", VX(4, 1071), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhosmi", VX(4, 1037), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhosmia", VX(4, 1069), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhoumi", VX(4, 1036), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhoumia", VX(4, 1068), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhessf", VX(4, 1027), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhessfa", VX(4, 1059), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhesmf", VX(4, 1035), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhesmfa", VX(4, 1067), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhesmi", VX(4, 1033), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhesmia", VX(4, 1065), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmheumi", VX(4, 1032), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmheumia", VX(4, 1064), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmhossfaaw",VX(4, 1287), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhossiaaw",VX(4, 1285), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhosmfaaw",VX(4, 1295), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhosmiaaw",VX(4, 1293), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhousiaaw",VX(4, 1284), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhoumiaaw",VX(4, 1292), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhessfaaw",VX(4, 1283), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhessiaaw",VX(4, 1281), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhesmfaaw",VX(4, 1291), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhesmiaaw",VX(4, 1289), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmheusiaaw",VX(4, 1280), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmheumiaaw",VX(4, 1288), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmhossfanw",VX(4, 1415), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhossianw",VX(4, 1413), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhosmfanw",VX(4, 1423), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhosmianw",VX(4, 1421), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhousianw",VX(4, 1412), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhoumianw",VX(4, 1420), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhessfanw",VX(4, 1411), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhessianw",VX(4, 1409), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhesmfanw",VX(4, 1419), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhesmianw",VX(4, 1417), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmheusianw",VX(4, 1408), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmheumianw",VX(4, 1416), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmhogsmfaa",VX(4, 1327), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhogsmiaa",VX(4, 1325), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhogumiaa",VX(4, 1324), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhegsmfaa",VX(4, 1323), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhegsmiaa",VX(4, 1321), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhegumiaa",VX(4, 1320), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmhogsmfan",VX(4, 1455), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhogsmian",VX(4, 1453), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhogumian",VX(4, 1452), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhegsmfan",VX(4, 1451), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhegsmian",VX(4, 1449), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmhegumian",VX(4, 1448), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwhssf", VX(4, 1095), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhssfa", VX(4, 1127), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhsmf", VX(4, 1103), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhsmfa", VX(4, 1135), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhsmi", VX(4, 1101), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhsmia", VX(4, 1133), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhumi", VX(4, 1100), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhumia", VX(4, 1132), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwlssf", VX(4, 1091), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlssfa", VX(4, 1123), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlsmf", VX(4, 1099), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlsmfa", VX(4, 1131), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlumi", VX(4, 1096), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlumia", VX(4, 1128), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwhssfaa",VX(4, 1351), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhssmaa",VX(4, 1349), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhsmfaa",VX(4, 1359), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhsmiaa",VX(4, 1357), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhusiaa",VX(4, 1348), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhumiaa",VX(4, 1356), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwlssfaaw",VX(4, 1347), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlssiaaw",VX(4, 1345), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlsmfaaw",VX(4, 1355), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlsmiaaw",VX(4, 1353), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlusiaaw",VX(4, 1344), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlumiaaw",VX(4, 1352), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwhssfan",VX(4, 1479), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhssian",VX(4, 1477), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhsmfan",VX(4, 1487), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhsmian",VX(4, 1485), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhusian",VX(4, 1476), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhumian",VX(4, 1484), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwlssfanw",VX(4, 1475), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlssianw",VX(4, 1473), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlsmfanw",VX(4, 1483), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlsmianw",VX(4, 1481), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlusianw",VX(4, 1472), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwlumianw",VX(4, 1480), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwhgssfaa",VX(4, 1383), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhgsmfaa",VX(4, 1391), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhgsmiaa",VX(4, 1381), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhgumiaa",VX(4, 1380), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwhgssfan",VX(4, 1511), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhgsmfan",VX(4, 1519), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhgsmian",VX(4, 1509), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwhgumian",VX(4, 1508), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwssf", VX(4, 1107), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwssfa", VX(4, 1139), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwsmf", VX(4, 1115), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwsmfa", VX(4, 1147), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwsmi", VX(4, 1113), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwsmia", VX(4, 1145), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwumi", VX(4, 1112), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwumia", VX(4, 1144), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwssfaa", VX(4, 1363), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwsmfaa", VX(4, 1371), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwsmiaa", VX(4, 1369), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwumiaa", VX(4, 1368), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evmwssfan", VX(4, 1491), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwsmfan", VX(4, 1499), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwsmian", VX(4, 1497), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evmwumian", VX(4, 1496), VX_MASK, PPCSPE, { RD, RA, RB } },
-
-{ "evaddssiaaw",VX(4, 1217), VX_MASK, PPCSPE, { RD, RA } },
-{ "evaddsmiaaw",VX(4, 1225), VX_MASK, PPCSPE, { RD, RA } },
-{ "evaddusiaaw",VX(4, 1216), VX_MASK, PPCSPE, { RD, RA } },
-{ "evaddumiaaw",VX(4, 1224), VX_MASK, PPCSPE, { RD, RA } },
-
-{ "evsubfssiaaw",VX(4, 1219), VX_MASK, PPCSPE, { RD, RA } },
-{ "evsubfsmiaaw",VX(4, 1227), VX_MASK, PPCSPE, { RD, RA } },
-{ "evsubfusiaaw",VX(4, 1218), VX_MASK, PPCSPE, { RD, RA } },
-{ "evsubfumiaaw",VX(4, 1226), VX_MASK, PPCSPE, { RD, RA } },
-
-{ "evmra", VX(4, 1220), VX_MASK, PPCSPE, { RD, RA } },
-
-{ "evdivws", VX(4, 1222), VX_MASK, PPCSPE, { RD, RA, RB } },
-{ "evdivwu", VX(4, 1223), VX_MASK, PPCSPE, { RD, RA, RB } },
+{ "efscfui", VX(4, 720), VX_MASK, PPCEFS, { RS, RB } },
+{ "efsctuiz", VX(4, 728), VX_MASK, PPCEFS, { RS, RB } },
+{ "efscfsi", VX(4, 721), VX_MASK, PPCEFS, { RS, RB } },
+{ "efscfuf", VX(4, 722), VX_MASK, PPCEFS, { RS, RB } },
+{ "efscfsf", VX(4, 723), VX_MASK, PPCEFS, { RS, RB } },
+{ "efsctui", VX(4, 724), VX_MASK, PPCEFS, { RS, RB } },
+{ "efsctsi", VX(4, 725), VX_MASK, PPCEFS, { RS, RB } },
+{ "efsctsiz", VX(4, 730), VX_MASK, PPCEFS, { RS, RB } },
+{ "efsctuf", VX(4, 726), VX_MASK, PPCEFS, { RS, RB } },
+{ "efsctsf", VX(4, 727), VX_MASK, PPCEFS, { RS, RB } },
+
+{ "evmhossf", VX(4, 1031), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhossfa", VX(4, 1063), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhosmf", VX(4, 1039), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhosmfa", VX(4, 1071), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhosmi", VX(4, 1037), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhosmia", VX(4, 1069), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhoumi", VX(4, 1036), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhoumia", VX(4, 1068), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhessf", VX(4, 1027), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhessfa", VX(4, 1059), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhesmf", VX(4, 1035), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhesmfa", VX(4, 1067), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhesmi", VX(4, 1033), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhesmia", VX(4, 1065), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmheumi", VX(4, 1032), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmheumia", VX(4, 1064), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmhossfaaw",VX(4, 1287), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhossiaaw",VX(4, 1285), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhosmfaaw",VX(4, 1295), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhosmiaaw",VX(4, 1293), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhousiaaw",VX(4, 1284), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhoumiaaw",VX(4, 1292), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhessfaaw",VX(4, 1283), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhessiaaw",VX(4, 1281), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhesmfaaw",VX(4, 1291), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhesmiaaw",VX(4, 1289), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmheusiaaw",VX(4, 1280), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmheumiaaw",VX(4, 1288), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmhossfanw",VX(4, 1415), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhossianw",VX(4, 1413), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhosmfanw",VX(4, 1423), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhosmianw",VX(4, 1421), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhousianw",VX(4, 1412), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhoumianw",VX(4, 1420), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhessfanw",VX(4, 1411), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhessianw",VX(4, 1409), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhesmfanw",VX(4, 1419), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhesmianw",VX(4, 1417), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmheusianw",VX(4, 1408), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmheumianw",VX(4, 1416), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmhogsmfaa",VX(4, 1327), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhogsmiaa",VX(4, 1325), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhogumiaa",VX(4, 1324), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhegsmfaa",VX(4, 1323), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhegsmiaa",VX(4, 1321), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhegumiaa",VX(4, 1320), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmhogsmfan",VX(4, 1455), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhogsmian",VX(4, 1453), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhogumian",VX(4, 1452), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhegsmfan",VX(4, 1451), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhegsmian",VX(4, 1449), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmhegumian",VX(4, 1448), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmwhssf", VX(4, 1095), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwhssfa", VX(4, 1127), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwhsmf", VX(4, 1103), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwhsmfa", VX(4, 1135), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwhsmi", VX(4, 1101), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwhsmia", VX(4, 1133), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwhumi", VX(4, 1100), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwhumia", VX(4, 1132), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmwlumi", VX(4, 1096), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwlumia", VX(4, 1128), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmwlssiaaw",VX(4, 1345), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwlsmiaaw",VX(4, 1353), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwlusiaaw",VX(4, 1344), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwlumiaaw",VX(4, 1352), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmwlssianw",VX(4, 1473), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwlsmianw",VX(4, 1481), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwlusianw",VX(4, 1472), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwlumianw",VX(4, 1480), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmwssf", VX(4, 1107), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwssfa", VX(4, 1139), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwsmf", VX(4, 1115), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwsmfa", VX(4, 1147), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwsmi", VX(4, 1113), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwsmia", VX(4, 1145), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwumi", VX(4, 1112), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwumia", VX(4, 1144), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmwssfaa", VX(4, 1363), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwsmfaa", VX(4, 1371), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwsmiaa", VX(4, 1369), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwumiaa", VX(4, 1368), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evmwssfan", VX(4, 1491), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwsmfan", VX(4, 1499), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwsmian", VX(4, 1497), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evmwumian", VX(4, 1496), VX_MASK, PPCSPE, { RS, RA, RB } },
+
+{ "evaddssiaaw",VX(4, 1217), VX_MASK, PPCSPE, { RS, RA } },
+{ "evaddsmiaaw",VX(4, 1225), VX_MASK, PPCSPE, { RS, RA } },
+{ "evaddusiaaw",VX(4, 1216), VX_MASK, PPCSPE, { RS, RA } },
+{ "evaddumiaaw",VX(4, 1224), VX_MASK, PPCSPE, { RS, RA } },
+
+{ "evsubfssiaaw",VX(4, 1219), VX_MASK, PPCSPE, { RS, RA } },
+{ "evsubfsmiaaw",VX(4, 1227), VX_MASK, PPCSPE, { RS, RA } },
+{ "evsubfusiaaw",VX(4, 1218), VX_MASK, PPCSPE, { RS, RA } },
+{ "evsubfumiaaw",VX(4, 1226), VX_MASK, PPCSPE, { RS, RA } },
+
+{ "evmra", VX(4, 1220), VX_MASK, PPCSPE, { RS, RA } },
+
+{ "evdivws", VX(4, 1222), VX_MASK, PPCSPE, { RS, RA, RB } },
+{ "evdivwu", VX(4, 1223), VX_MASK, PPCSPE, { RS, RA, RB } },