+
+ if (ARMul_ReadWord (state, ARMul_GetPC (state)) == 0)
+ {
+ /* No vector has been installed. Rather than simulating whatever
+ random bits might happen to be at address 0x20 onwards we elect
+ to stop. */
+ switch (vector)
+ {
+ case ARMul_ResetV: state->EndCondition = RDIError_Reset; break;
+ case ARMul_UndefinedInstrV: state->EndCondition = RDIError_UndefinedInstruction; break;
+ case ARMul_SWIV: state->EndCondition = RDIError_SoftwareInterrupt; break;
+ case ARMul_PrefetchAbortV: state->EndCondition = RDIError_PrefetchAbort; break;
+ case ARMul_DataAbortV: state->EndCondition = RDIError_DataAbort; break;
+ case ARMul_AddrExceptnV: state->EndCondition = RDIError_AddressException; break;
+ case ARMul_IRQV: state->EndCondition = RDIError_IRQ; break;
+ case ARMul_FIQV: state->EndCondition = RDIError_FIQ; break;
+ default: break;
+ }
+ state->Emulate = FALSE;
+ }