Remove i386_elf_emit_arch_note

[deliverable/binutils-gdb.git] / sim / arm / armos.c

diff --git a/sim/arm/armos.c b/sim/arm/armos.c
index bdc53d4e6c381770c82e27cb705fc3e68f5c6a29..e5c218d0c6f4069f8a89c755daf96fbc0787700f 100644 (file)
--- a/sim/arm/armos.c
+++ b/sim/arm/armos.c
@@ -3,7 +3,7 @@
  
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
  
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by

-    the Free Software Foundation; either version 2 of the License, or
+    the Free Software Foundation; either version 3 of the License, or

     (at your option) any later version.
  
     This program is distributed in the hope that it will be useful,
     (at your option) any later version.
  
     This program is distributed in the hope that it will be useful,


@@ -12,8 +12,7 @@
     GNU General Public License for more details.
  
     You should have received a copy of the GNU General Public License
     GNU General Public License for more details.
  
     You should have received a copy of the GNU General Public License

-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+    along with this program; if not, see <http://www.gnu.org/licenses/>. */

 
 /* This file contains a model of Demon, ARM Ltd's Debug Monitor,
    including all the SWI's required to support the C library. The code in
 
 /* This file contains a model of Demon, ARM Ltd's Debug Monitor,
    including all the SWI's required to support the C library. The code in


@@ -27,24 +26,12 @@
 
 #include <time.h>
 #include <errno.h>
 
 #include <time.h>
 #include <errno.h>

+#include <limits.h>

 #include <string.h>
 #include <string.h>

-#include <fcntl.h>
+#include "targ-vals.h"

 
 

-#ifndef O_RDONLY
-#define O_RDONLY 0
-#endif
-#ifndef O_WRONLY
-#define O_WRONLY 1
-#endif
-#ifndef O_RDWR
-#define O_RDWR   2
-#endif
-#ifndef O_BINARY
-#define O_BINARY 0
-#endif
-
-#ifdef __STDC__
-#define unlink(s) remove(s)
+#ifndef TARGET_O_BINARY
+#define TARGET_O_BINARY 0

 #endif
 
 #ifdef HAVE_UNISTD_H
 #endif
 
 #ifdef HAVE_UNISTD_H


@@ -83,7 +70,7 @@ extern int _fisatty (FILE *);
 /* For RDIError_BreakpointReached.  */
 #include "dbg_rdi.h"
 
 /* For RDIError_BreakpointReached.  */
 #include "dbg_rdi.h"
 

-#include "callback.h"
+#include "gdb/callback.h"

 extern host_callback *sim_callback;
 
 extern unsigned ARMul_OSInit       (ARMul_State *);
 extern host_callback *sim_callback;
 
 extern unsigned ARMul_OSInit       (ARMul_State *);


@@ -98,6 +85,9 @@ extern ARMword  ARMul_Debug        (ARMul_State *, ARMword, ARMword);
 #define FOPEN_MAX 64
 #endif
 #define UNIQUETEMPS 256
 #define FOPEN_MAX 64
 #endif
 #define UNIQUETEMPS 256

+#ifndef PATH_MAX
+#define PATH_MAX 1024
+#endif

 
 /* OS private Information.  */
 
 
 /* OS private Information.  */
 


@@ -125,10 +115,17 @@ struct OSblock
 #define FIXCRLF(t,c) c
 #endif
 
 #define FIXCRLF(t,c) c
 #endif
 

+/* Bit mask of enabled SWI implementations.  */
+unsigned int swi_mask = -1;
+
+

 static ARMword softvectorcode[] =
 {
 static ARMword softvectorcode[] =
 {

-  /* Basic: swi tidyexception + event; mov pc, lr;
-     ldmia r11,{r11,pc}; swi generateexception  + event.  */
+  /* Installed instructions:
+       swi    tidyexception + event;
+       mov    lr, pc;
+       ldmia  fp, {fp, pc};
+       swi    generateexception  + event.  */

   0xef000090, 0xe1a0e00f, 0xe89b8800, 0xef000080, /* Reset */
   0xef000091, 0xe1a0e00f, 0xe89b8800, 0xef000081, /* Undef */
   0xef000092, 0xe1a0e00f, 0xe89b8800, 0xef000082, /* SWI */
   0xef000090, 0xe1a0e00f, 0xe89b8800, 0xef000080, /* Reset */
   0xef000091, 0xe1a0e00f, 0xe89b8800, 0xef000081, /* Undef */
   0xef000092, 0xe1a0e00f, 0xe89b8800, 0xef000082, /* SWI */


@@ -171,7 +168,8 @@ ARMul_OSInit (ARMul_State * state)
   instr = 0xe59ff000 | (ADDRSOFTVECTORS - 8);          /* Load pc from soft vector */
   
   for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
   instr = 0xe59ff000 | (ADDRSOFTVECTORS - 8);          /* Load pc from soft vector */
   
   for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)

-    ARMul_WriteWord (state, i, instr); /* Write hardware vectors.  */
+    /* Write hardware vectors.  */
+    ARMul_WriteWord (state, i, instr);

   
   SWI_vector_installed = 0;
 
   
   SWI_vector_installed = 0;
 


@@ -200,11 +198,15 @@ ARMul_OSInit (ARMul_State * state)
     /* Copy the code.  */
     ARMul_WriteWord (state, FPESTART + i, fpecode[i >> 2]);
 
     /* Copy the code.  */
     ARMul_WriteWord (state, FPESTART + i, fpecode[i >> 2]);
 

+  /* Scan backwards from the end of the code.  */

   for (i = FPESTART + fpesize;; i -= 4)
     {
   for (i = FPESTART + fpesize;; i -= 4)
     {

-      /* Reverse the error strings.  */
+      /* When we reach the marker value, break out of
+        the loop, leaving i pointing at the maker.  */

       if ((j = ARMul_ReadWord (state, i)) == 0xffffffff)
        break;
       if ((j = ARMul_ReadWord (state, i)) == 0xffffffff)
        break;

+
+      /* If necessary, reverse the error strings.  */

       if (state->bigendSig && j < 0x80000000)
        {
          /* It's part of the string so swap it.  */
       if (state->bigendSig && j < 0x80000000)
        {
          /* It's part of the string so swap it.  */


@@ -216,16 +218,20 @@ ARMul_OSInit (ARMul_State * state)
     }
 
   /* Copy old illegal instr vector.  */
     }
 
   /* Copy old illegal instr vector.  */

-  ARMul_WriteWord (state, FPEOLDVECT, ARMul_ReadWord (state, 4));
+  ARMul_WriteWord (state, FPEOLDVECT, ARMul_ReadWord (state, ARMUndefinedInstrV));

   /* Install new vector.  */
   /* Install new vector.  */

-  ARMul_WriteWord (state, 4, FPENEWVECT (ARMul_ReadWord (state, i - 4)));
+  ARMul_WriteWord (state, ARMUndefinedInstrV, FPENEWVECT (ARMul_ReadWord (state, i - 4)));

   ARMul_ConsolePrint (state, ", FPE");
 
 /* #endif  ASIM */
 #endif /* VALIDATE */
 #endif /* NOOS */
 
   ARMul_ConsolePrint (state, ", FPE");
 
 /* #endif  ASIM */
 #endif /* VALIDATE */
 #endif /* NOOS */
 

-  return TRUE;
+  /* Intel do not want DEMON SWI support.  */
+   if (state->is_XScale)
+    swi_mask = SWI_MASK_ANGEL;
+
+   return TRUE;

 }
 
 void
 }
 
 void


@@ -244,18 +250,18 @@ ARMword ARMul_OSLastErrorP (ARMul_State * state)
 
 static int translate_open_mode[] =
 {
 
 static int translate_open_mode[] =
 {

-  O_RDONLY,                    /* "r"   */
-  O_RDONLY + O_BINARY,         /* "rb"  */
-  O_RDWR,                      /* "r+"  */
-  O_RDWR + O_BINARY,           /* "r+b" */
-  O_WRONLY + O_CREAT + O_TRUNC,        /* "w"   */
-  O_WRONLY + O_BINARY + O_CREAT + O_TRUNC,     /* "wb"  */
-  O_RDWR + O_CREAT + O_TRUNC,  /* "w+"  */
-  O_RDWR + O_BINARY + O_CREAT + O_TRUNC,       /* "w+b" */
-  O_WRONLY + O_APPEND + O_CREAT,       /* "a"   */
-  O_WRONLY + O_BINARY + O_APPEND + O_CREAT,    /* "ab"  */
-  O_RDWR + O_APPEND + O_CREAT, /* "a+"  */
-  O_RDWR + O_BINARY + O_APPEND + O_CREAT       /* "a+b" */
+  TARGET_O_RDONLY,             /* "r"   */
+  TARGET_O_RDONLY + TARGET_O_BINARY,   /* "rb"  */
+  TARGET_O_RDWR,               /* "r+"  */
+  TARGET_O_RDWR + TARGET_O_BINARY,             /* "r+b" */
+  TARGET_O_WRONLY + TARGET_O_CREAT + TARGET_O_TRUNC,   /* "w"   */
+  TARGET_O_WRONLY + TARGET_O_BINARY + TARGET_O_CREAT + TARGET_O_TRUNC, /* "wb"  */
+  TARGET_O_RDWR + TARGET_O_CREAT + TARGET_O_TRUNC,     /* "w+"  */
+  TARGET_O_RDWR + TARGET_O_BINARY + TARGET_O_CREAT + TARGET_O_TRUNC,   /* "w+b" */
+  TARGET_O_WRONLY + TARGET_O_APPEND + TARGET_O_CREAT,  /* "a"   */
+  TARGET_O_WRONLY + TARGET_O_BINARY + TARGET_O_APPEND + TARGET_O_CREAT,        /* "ab"  */
+  TARGET_O_RDWR + TARGET_O_APPEND + TARGET_O_CREAT,    /* "a+"  */
+  TARGET_O_RDWR + TARGET_O_BINARY + TARGET_O_APPEND + TARGET_O_CREAT   /* "a+b" */

 };
 
 static void
 };
 
 static void


@@ -265,7 +271,13 @@ SWIWrite0 (ARMul_State * state, ARMword addr)
   struct OSblock *OSptr = (struct OSblock *) state->OSptr;
 
   while ((temp = ARMul_SafeReadByte (state, addr++)) != 0)
   struct OSblock *OSptr = (struct OSblock *) state->OSptr;
 
   while ((temp = ARMul_SafeReadByte (state, addr++)) != 0)

-    (void) sim_callback->write_stdout (sim_callback, (char *) &temp, 1);
+    {
+      char buffer = temp;
+      /* Note - we cannot just cast 'temp' to a (char *) here,
+        since on a big-endian host the byte value will end
+        up in the wrong place and a nul character will be printed.  */
+      (void) sim_callback->write_stdout (sim_callback, & buffer, 1);
+    }

 
   OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
 }
 
   OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
 }


@@ -286,31 +298,44 @@ WriteCommandLineTo (ARMul_State * state, ARMword addr)
   while (temp != 0);
 }
 
   while (temp != 0);
 }
 

+static int
+ReadFileName (ARMul_State * state, char *buf, ARMword src, size_t n)
+{
+  struct OSblock *OSptr = (struct OSblock *) state->OSptr;
+  char *p = buf;
+
+  while (n--)
+    if ((*p++ = ARMul_SafeReadByte (state, src++)) == '\0')
+      return 0;
+  OSptr->ErrorNo = cb_host_to_target_errno (sim_callback, ENAMETOOLONG);
+  state->Reg[0] = -1;
+  return -1;
+}
+

 static void
 SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
 {
   struct OSblock *OSptr = (struct OSblock *) state->OSptr;
 static void
 SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
 {
   struct OSblock *OSptr = (struct OSblock *) state->OSptr;

-  char dummy[2000];
+  char buf[PATH_MAX];

   int flags;
   int flags;

-  int i;

 
 

-  for (i = 0; (dummy[i] = ARMul_SafeReadByte (state, name + i)); i++)
-    ;
+  if (ReadFileName (state, buf, name, sizeof buf) == -1)
+    return;

 
   /* Now we need to decode the Demon open mode.  */
   flags = translate_open_mode[SWIflags];
 
   /* Filename ":tt" is special: it denotes stdin/out.  */
 
   /* Now we need to decode the Demon open mode.  */
   flags = translate_open_mode[SWIflags];
 
   /* Filename ":tt" is special: it denotes stdin/out.  */

-  if (strcmp (dummy, ":tt") == 0)
+  if (strcmp (buf, ":tt") == 0)

     {
     {

-      if (flags == O_RDONLY)   /* opening tty "r" */
+      if (flags == TARGET_O_RDONLY) /* opening tty "r" */

        state->Reg[0] = 0;      /* stdin */
       else
        state->Reg[0] = 1;      /* stdout */
     }
   else
     {
        state->Reg[0] = 0;      /* stdin */
       else
        state->Reg[0] = 1;      /* stdout */
     }
   else
     {

-      state->Reg[0] = sim_callback->open (sim_callback, dummy, flags);
+      state->Reg[0] = sim_callback->open (sim_callback, buf, flags);

       OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
     }
 }
       OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
     }
 }


@@ -375,7 +400,7 @@ SWIflen (ARMul_State * state, ARMword fh)
   struct OSblock *OSptr = (struct OSblock *) state->OSptr;
   ARMword addr;
 
   struct OSblock *OSptr = (struct OSblock *) state->OSptr;
   ARMword addr;
 

-  if (fh == 0 || fh > FOPEN_MAX)
+  if (fh > FOPEN_MAX)

     {
       OSptr->ErrorNo = EBADF;
       state->Reg[0] = -1L;
     {
       OSptr->ErrorNo = EBADF;
       state->Reg[0] = -1L;


@@ -390,116 +415,167 @@ SWIflen (ARMul_State * state, ARMword fh)
   OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
 }
 
   OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
 }
 

+static void
+SWIremove (ARMul_State * state, ARMword path)
+{
+  char buf[PATH_MAX];
+
+  if (ReadFileName (state, buf, path, sizeof buf) != -1)
+    {
+      struct OSblock *OSptr = (struct OSblock *) state->OSptr;
+      state->Reg[0] = sim_callback->unlink (sim_callback, buf);
+      OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+    }
+}
+
+static void
+SWIrename (ARMul_State * state, ARMword old, ARMword new)
+{
+  char oldbuf[PATH_MAX], newbuf[PATH_MAX];
+
+  if (ReadFileName (state, oldbuf, old, sizeof oldbuf) != -1
+      && ReadFileName (state, newbuf, new, sizeof newbuf) != -1)
+    {
+      struct OSblock *OSptr = (struct OSblock *) state->OSptr;
+      state->Reg[0] = sim_callback->rename (sim_callback, oldbuf, newbuf);
+      OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+    }
+}
+

 /* The emulator calls this routine when a SWI instruction is encuntered.
    The parameter passed is the SWI number (lower 24 bits of the instruction).  */
 
 unsigned
 ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
 {
 /* The emulator calls this routine when a SWI instruction is encuntered.
    The parameter passed is the SWI number (lower 24 bits of the instruction).  */
 
 unsigned
 ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
 {

-  ARMword          addr;
-  ARMword          temp;
-  ARMword          saved_number = 0;

   struct OSblock * OSptr = (struct OSblock *) state->OSptr;
   struct OSblock * OSptr = (struct OSblock *) state->OSptr;

-  
-  /* Intel do not want DEMON SWI support.  */
-  if (state->is_XScale)
-    switch (number)
-    {
-    case SWI_Read:
-    case SWI_Write:
-    case SWI_Open:
-    case SWI_Clock:
-    case SWI_Time:
-    case SWI_Close:
-    case SWI_Flen:
-    case SWI_Exit:
-    case SWI_Seek:
-    case SWI_WriteC:
-    case SWI_Write0:
-    case SWI_GetErrno:
-    case SWI_GetEnv:
-      saved_number = number;
-      number = -1;
-    default:
-      break;
-    }
-  
+  int              unhandled = FALSE;
+

   switch (number)
     {
     case SWI_Read:
   switch (number)
     {
     case SWI_Read:

-      SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
+      if (swi_mask & SWI_MASK_DEMON)
+       SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Write:
       break;
 
     case SWI_Write:

-      SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
+      if (swi_mask & SWI_MASK_DEMON)
+       SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Open:
       break;
 
     case SWI_Open:

-      SWIopen (state, state->Reg[0], state->Reg[1]);
+      if (swi_mask & SWI_MASK_DEMON)
+       SWIopen (state, state->Reg[0], state->Reg[1]);
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Clock:
       break;
 
     case SWI_Clock:

-      /* Return number of centi-seconds.  */
-      state->Reg[0] =
+      if (swi_mask & SWI_MASK_DEMON)
+       {
+         /* Return number of centi-seconds.  */
+         state->Reg[0] =

 #ifdef CLOCKS_PER_SEC
 #ifdef CLOCKS_PER_SEC

-       (CLOCKS_PER_SEC >= 100)
-       ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
-       : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
+           (CLOCKS_PER_SEC >= 100)
+           ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
+           : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);

 #else
 #else

-       /* Presume unix... clock() returns microseconds.  */
-       (ARMword) (clock () / 10000);
+         /* Presume unix... clock() returns microseconds.  */
+         (ARMword) (clock () / 10000);

 #endif
 #endif

-      OSptr->ErrorNo = errno;
+         OSptr->ErrorNo = errno;
+       }
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Time:
       break;
 
     case SWI_Time:

-      state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
-      OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+      if (swi_mask & SWI_MASK_DEMON)
+       {
+         state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
+         OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+       }
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Close:
       break;
 
     case SWI_Close:

-      state->Reg[0] = sim_callback->close (sim_callback, state->Reg[0]);
-      OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+      if (swi_mask & SWI_MASK_DEMON)
+       {
+         state->Reg[0] = sim_callback->close (sim_callback, state->Reg[0]);
+         OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+       }
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Flen:
       break;
 
     case SWI_Flen:

-      SWIflen (state, state->Reg[0]);
+      if (swi_mask & SWI_MASK_DEMON)
+       SWIflen (state, state->Reg[0]);
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Exit:
       break;
 
     case SWI_Exit:

-      state->Emulate = FALSE;
+      if (swi_mask & SWI_MASK_DEMON)
+       state->Emulate = FALSE;
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Seek:
       break;
 
     case SWI_Seek:

-      /* We must return non-zero for failure.  */
-      state->Reg[0] = -1 >= sim_callback->lseek (sim_callback, state->Reg[0], state->Reg[1], SEEK_SET);
-      OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+      if (swi_mask & SWI_MASK_DEMON)
+       {
+         /* We must return non-zero for failure.  */
+         state->Reg[0] = -1 >= sim_callback->lseek (sim_callback, state->Reg[0], state->Reg[1], SEEK_SET);
+         OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+       }
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_WriteC:
       break;
 
     case SWI_WriteC:

-      {
-       char tmp = state->Reg[0];
-       (void) sim_callback->write_stdout (sim_callback, &tmp, 1);
-       OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
-      }
+      if (swi_mask & SWI_MASK_DEMON)
+       {
+         char tmp = state->Reg[0];
+         (void) sim_callback->write_stdout (sim_callback, &tmp, 1);
+         OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+       }
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Write0:
       break;
 
     case SWI_Write0:

-      SWIWrite0 (state, state->Reg[0]);
+      if (swi_mask & SWI_MASK_DEMON)
+       SWIWrite0 (state, state->Reg[0]);
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_GetErrno:
       break;
 
     case SWI_GetErrno:

-      state->Reg[0] = OSptr->ErrorNo;
+      if (swi_mask & SWI_MASK_DEMON)
+       state->Reg[0] = OSptr->ErrorNo;
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_GetEnv:
       break;
 
     case SWI_GetEnv:

-      state->Reg[0] = ADDRCMDLINE;
-      if (state->MemSize)
-       state->Reg[1] = state->MemSize;
-      else
-       state->Reg[1] = ADDRUSERSTACK;
+      if (swi_mask & SWI_MASK_DEMON)
+       {
+         state->Reg[0] = ADDRCMDLINE;
+         if (state->MemSize)
+           state->Reg[1] = state->MemSize;
+         else
+           state->Reg[1] = ADDRUSERSTACK;

 
 

-      WriteCommandLineTo (state, state->Reg[0]);
+         WriteCommandLineTo (state, state->Reg[0]);
+       }
+      else
+       unhandled = TRUE;

       break;
 
     case SWI_Breakpoint:
       break;
 
     case SWI_Breakpoint:


@@ -507,211 +583,319 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
       state->Emulate = FALSE;
       break;
 
       state->Emulate = FALSE;
       break;
 

+    case SWI_Remove:
+      if (swi_mask & SWI_MASK_DEMON)
+       SWIremove (state, state->Reg[0]);
+      else
+       unhandled = TRUE;
+      break;
+
+    case SWI_Rename:
+      if (swi_mask & SWI_MASK_DEMON)
+       SWIrename (state, state->Reg[0], state->Reg[1]);
+      else
+       unhandled = TRUE;
+      break;
+
+    case SWI_IsTTY:
+      if (swi_mask & SWI_MASK_DEMON)
+       {
+         state->Reg[0] = sim_callback->isatty (sim_callback, state->Reg[0]);
+         OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+       }
+      else
+       unhandled = TRUE;
+      break;
+

       /* Handle Angel SWIs as well as Demon ones.  */
     case AngelSWI_ARM:
     case AngelSWI_Thumb:
       /* Handle Angel SWIs as well as Demon ones.  */
     case AngelSWI_ARM:
     case AngelSWI_Thumb:

-      /* R1 is almost always a parameter block.  */
-      addr = state->Reg[1];
-      /* R0 is a reason code.  */
-      switch (state->Reg[0])
+      if (swi_mask & SWI_MASK_ANGEL)

        {
        {

-         /* Unimplemented reason codes.  */
-       case AngelSWI_Reason_ReadC:
-       case AngelSWI_Reason_IsTTY:
-       case AngelSWI_Reason_TmpNam:
-       case AngelSWI_Reason_Remove:
-       case AngelSWI_Reason_Rename:
-       case AngelSWI_Reason_System:
-       case AngelSWI_Reason_EnterSVC:
-       default:
-         state->Emulate = FALSE;
-         return FALSE;
-
-       case AngelSWI_Reason_Clock:
-         /* Return number of centi-seconds.  */
-         state->Reg[0] =
+         ARMword addr;
+         ARMword temp;
+
+         /* R1 is almost always a parameter block.  */
+         addr = state->Reg[1];
+         /* R0 is a reason code.  */
+         switch (state->Reg[0])
+           {
+           case -1:
+             /* This can happen when a SWI is interrupted (eg receiving a
+                ctrl-C whilst processing SWIRead()).  The SWI will complete
+                returning -1 in r0 to the caller.  If GDB is then used to
+                resume the system call the reason code will now be -1.  */
+             return TRUE;
+         
+             /* Unimplemented reason codes.  */
+           case AngelSWI_Reason_ReadC:
+           case AngelSWI_Reason_TmpNam:
+           case AngelSWI_Reason_System:
+           case AngelSWI_Reason_EnterSVC:
+           default:
+             state->Emulate = FALSE;
+             return FALSE;
+
+           case AngelSWI_Reason_Clock:
+             /* Return number of centi-seconds.  */
+             state->Reg[0] =

 #ifdef CLOCKS_PER_SEC
 #ifdef CLOCKS_PER_SEC

-           (CLOCKS_PER_SEC >= 100)
-           ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
-           : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
+               (CLOCKS_PER_SEC >= 100)
+               ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
+               : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);

 #else
 #else

-           /* Presume unix... clock() returns microseconds.  */
-           (ARMword) (clock () / 10000);
+             /* Presume unix... clock() returns microseconds.  */
+             (ARMword) (clock () / 10000);

 #endif
 #endif

-         OSptr->ErrorNo = errno;
-         break;
-
-       case AngelSWI_Reason_Time:
-         state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
-         OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
-         break;
-
-       case AngelSWI_Reason_WriteC:
-         {
-           char tmp = ARMul_SafeReadByte (state, addr);
-           (void) sim_callback->write_stdout (sim_callback, &tmp, 1);
-           OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
-         }
-         /* Fall thgrough.  */
-
-       case AngelSWI_Reason_Write0:
-         SWIWrite0 (state, addr);
-         break;
-
-       case AngelSWI_Reason_Close:
-         state->Reg[0] = sim_callback->close (sim_callback, ARMul_ReadWord (state, addr));
-         OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
-         break;
-
-       case AngelSWI_Reason_Seek:
-         state->Reg[0] = -1 >= sim_callback->lseek (sim_callback, ARMul_ReadWord (state, addr),
-                                      ARMul_ReadWord (state, addr + 4),
-                                      SEEK_SET);
-         OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
-         break;
-
-       case AngelSWI_Reason_FLen:
-         SWIflen (state, ARMul_ReadWord (state, addr));
-         break;
-
-       case AngelSWI_Reason_GetCmdLine:
-         WriteCommandLineTo (state, ARMul_ReadWord (state, addr));
-         break;
-
-       case AngelSWI_Reason_HeapInfo:
-         /* R1 is a pointer to a pointer.  */
-         addr = ARMul_ReadWord (state, addr);
-
-         /* Pick up the right memory limit.  */
-         if (state->MemSize)
-           temp = state->MemSize;
-         else
-           temp = ADDRUSERSTACK;
-
-         ARMul_WriteWord (state, addr, 0);             /* Heap base.  */
-         ARMul_WriteWord (state, addr + 4, temp);      /* Heap limit.  */
-         ARMul_WriteWord (state, addr + 8, temp);      /* Stack base.  */
-         ARMul_WriteWord (state, addr + 12, temp);     /* Stack limit.  */
-         break;
-
-       case AngelSWI_Reason_ReportException:
-         if (state->Reg[1] == ADP_Stopped_ApplicationExit)
-           state->Reg[0] = 0;
-         else
-           state->Reg[0] = -1;
-         state->Emulate = FALSE;
-         break;
-
-       case ADP_Stopped_ApplicationExit:
-         state->Reg[0] = 0;
-         state->Emulate = FALSE;
-         break;
-
-       case ADP_Stopped_RunTimeError:
-         state->Reg[0] = -1;
-         state->Emulate = FALSE;
-         break;
-
-       case AngelSWI_Reason_Errno:
-         state->Reg[0] = OSptr->ErrorNo;
-         break;
-
-       case AngelSWI_Reason_Open:
-         SWIopen (state,
-                  ARMul_ReadWord (state, addr),
-                  ARMul_ReadWord (state, addr + 4));
-         break;
-
-       case AngelSWI_Reason_Read:
-         SWIread (state,
-                  ARMul_ReadWord (state, addr),
-                  ARMul_ReadWord (state, addr + 4),
-                  ARMul_ReadWord (state, addr + 8));
-         break;
-
-       case AngelSWI_Reason_Write:
-         SWIwrite (state,
-                   ARMul_ReadWord (state, addr),
-                   ARMul_ReadWord (state, addr + 4),
-                   ARMul_ReadWord (state, addr + 8));
-         break;
+             OSptr->ErrorNo = errno;
+             break;
+
+           case AngelSWI_Reason_Time:
+             state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
+             OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+             break;
+
+           case AngelSWI_Reason_WriteC:
+             {
+               char tmp = ARMul_SafeReadByte (state, addr);
+               (void) sim_callback->write_stdout (sim_callback, &tmp, 1);
+               OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+               break;
+             }
+
+           case AngelSWI_Reason_Write0:
+             SWIWrite0 (state, addr);
+             break;
+
+           case AngelSWI_Reason_Close:
+             state->Reg[0] = sim_callback->close (sim_callback, ARMul_ReadWord (state, addr));
+             OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+             break;
+
+           case AngelSWI_Reason_Seek:
+             state->Reg[0] = -1 >= sim_callback->lseek (sim_callback, ARMul_ReadWord (state, addr),
+                                                        ARMul_ReadWord (state, addr + 4),
+                                                        SEEK_SET);
+             OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+             break;
+
+           case AngelSWI_Reason_FLen:
+             SWIflen (state, ARMul_ReadWord (state, addr));
+             break;
+
+           case AngelSWI_Reason_GetCmdLine:
+             WriteCommandLineTo (state, ARMul_ReadWord (state, addr));
+             break;
+
+           case AngelSWI_Reason_HeapInfo:
+             /* R1 is a pointer to a pointer.  */
+             addr = ARMul_ReadWord (state, addr);
+
+             /* Pick up the right memory limit.  */
+             if (state->MemSize)
+               temp = state->MemSize;
+             else
+               temp = ADDRUSERSTACK;
+
+             ARMul_WriteWord (state, addr, 0);         /* Heap base.  */
+             ARMul_WriteWord (state, addr + 4, temp);  /* Heap limit.  */
+             ARMul_WriteWord (state, addr + 8, temp);  /* Stack base.  */
+             ARMul_WriteWord (state, addr + 12, temp); /* Stack limit.  */
+             break;
+
+           case AngelSWI_Reason_ReportException:
+             if (state->Reg[1] == ADP_Stopped_ApplicationExit)
+               state->Reg[0] = 0;
+             else
+               state->Reg[0] = -1;
+             state->Emulate = FALSE;
+             break;
+
+           case ADP_Stopped_ApplicationExit:
+             state->Reg[0] = 0;
+             state->Emulate = FALSE;
+             break;
+
+           case ADP_Stopped_RunTimeError:
+             state->Reg[0] = -1;
+             state->Emulate = FALSE;
+             break;
+
+           case AngelSWI_Reason_Errno:
+             state->Reg[0] = OSptr->ErrorNo;
+             break;
+
+           case AngelSWI_Reason_Open:
+             SWIopen (state,
+                      ARMul_ReadWord (state, addr),
+                      ARMul_ReadWord (state, addr + 4));
+             break;
+
+           case AngelSWI_Reason_Read:
+             SWIread (state,
+                      ARMul_ReadWord (state, addr),
+                      ARMul_ReadWord (state, addr + 4),
+                      ARMul_ReadWord (state, addr + 8));
+             break;
+
+           case AngelSWI_Reason_Write:
+             SWIwrite (state,
+                       ARMul_ReadWord (state, addr),
+                       ARMul_ReadWord (state, addr + 4),
+                       ARMul_ReadWord (state, addr + 8));
+             break;
+
+           case AngelSWI_Reason_IsTTY:
+             state->Reg[0] = sim_callback->isatty (sim_callback,
+                                                   ARMul_ReadWord (state, addr));
+             OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+             break;
+
+           case AngelSWI_Reason_Remove:
+             SWIremove (state,
+                        ARMul_ReadWord (state, addr));
+
+           case AngelSWI_Reason_Rename:
+             SWIrename (state,
+                        ARMul_ReadWord (state, addr),
+                        ARMul_ReadWord (state, addr + 4));
+           }

        }
        }

-
-    case 0x90:
-    case 0x91:
-    case 0x92:
-      /* These are used by the FPE code.  */
+      else
+       unhandled = TRUE;

       break;
       break;

-      
-    case 0x180001: /* RedBoot's Syscall SWI in ARM mode.  */
-      switch (state->Reg[0])
-       {
-         /* These numbers are defined in libgloss/syscall.h
-            but the simulator should not be dependend upon
-            libgloss being installed.  */
-       case 1:  /* Exit.  */
-         state->Emulate = FALSE;
-         return TRUE;
-
-       case 2:  /* Open.  */
-         SWIopen (state, state->Reg[1], state->Reg[2]);
-         return TRUE;
-
-       case 3:  /* Close.  */
-         state->Reg[0] = close (state->Reg[1]);
-         OSptr->ErrorNo = errno;
-         return TRUE;
-
-       case 4:  /* Read.  */
-         SWIread (state, state->Reg[1], state->Reg[2], state->Reg[3]);
-         return TRUE;

 
 

-       case 5:  /* Write.  */
-         SWIwrite (state, state->Reg[1], state->Reg[2], state->Reg[3]);
-         return TRUE;
-
-       case 6:  /* Lseek.  */
-         state->Reg[0] = lseek (state->Reg[1], state->Reg[2], state->Reg[3]);
-         OSptr->ErrorNo = errno;
-         return TRUE;
+      /* The following SWIs are generated by the softvectorcode[]
+        installed by default by the simulator.  */
+    case 0x91: /* Undefined Instruction.  */
+      {
+       ARMword addr = state->RegBank[UNDEFBANK][14] - 4;
+       
+       sim_callback->printf_filtered
+         (sim_callback, "sim: exception: Unhandled Instruction '0x%08x' at 0x%08x.  Stopping.\n",
+          ARMul_ReadWord (state, addr), addr);
+       state->EndCondition = RDIError_SoftwareInterrupt;
+       state->Emulate = FALSE;
+       return FALSE;
+      }      
+
+    case 0x90: /* Reset.  */
+    case 0x92: /* SWI.  */
+      /* These two can be safely ignored.  */
+      break;

 
 

-       case 17: /* Utime.  */
-         state->Reg[0] = (ARMword) time (state->Reg[1]);
-         OSptr->ErrorNo = errno;
-         return (TRUE);
-
-       case 7:  /* Unlink.  */
-       case 8:  /* Getpid.  */
-       case 9:  /* Kill.  */
-       case 10: /* Fstat.  */
-       case 11: /* Sbrk.  */
-       case 12: /* Argvlen.  */
-       case 13: /* Argv.  */
-       case 14: /* ChDir.  */
-       case 15: /* Stat.  */
-       case 16: /* Chmod.  */
-       case 18: /* Time.  */
-         sim_callback->printf_filtered
-           (sim_callback,
-            "sim: unhandled RedBoot syscall '%d' encountered - ignoring\n",
-            state->Reg[0]);
-         return FALSE;
+    case 0x93: /* Prefetch Abort.  */
+    case 0x94: /* Data Abort.  */
+    case 0x95: /* Address Exception.  */
+    case 0x96: /* IRQ.  */
+    case 0x97: /* FIQ.  */
+    case 0x98: /* Error.  */
+      unhandled = TRUE;
+      break;

 
 

-       default:
-         sim_callback->printf_filtered
-           (sim_callback,
-            "sim: unknown RedBoot syscall '%d' encountered - ignoring\n",
-            state->Reg[0]);
-         return FALSE;
-       }
+    case -1:
+      /* This can happen when a SWI is interrupted (eg receiving a
+        ctrl-C whilst processing SWIRead()).  The SWI will complete
+        returning -1 in r0 to the caller.  If GDB is then used to
+        resume the system call the reason code will now be -1.  */

       return TRUE;
       return TRUE;

+         
+    case 0x180001: /* RedBoot's Syscall SWI in ARM mode.  */
+      if (swi_mask & SWI_MASK_REDBOOT)
+       {
+         switch (state->Reg[0])
+           {
+             /* These numbers are defined in libgloss/syscall.h
+                but the simulator should not be dependend upon
+                libgloss being installed.  */
+           case 1:  /* Exit.  */
+             state->Emulate = FALSE;
+             /* Copy exit code into r0.  */
+             state->Reg[0] = state->Reg[1];
+             break;
+
+           case 2:  /* Open.  */
+             SWIopen (state, state->Reg[1], state->Reg[2]);
+             break;
+
+           case 3:  /* Close.  */
+             state->Reg[0] = sim_callback->close (sim_callback, state->Reg[1]);
+             OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+             break;
+
+           case 4:  /* Read.  */
+             SWIread (state, state->Reg[1], state->Reg[2], state->Reg[3]);
+             break;
+
+           case 5:  /* Write.  */
+             SWIwrite (state, state->Reg[1], state->Reg[2], state->Reg[3]);
+             break;
+
+           case 6:  /* Lseek.  */
+             state->Reg[0] = sim_callback->lseek (sim_callback,
+                                                  state->Reg[1],
+                                                  state->Reg[2],
+                                                  state->Reg[3]);
+             OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+             break;
+
+           case 17: /* Utime.  */
+             state->Reg[0] = (ARMword) sim_callback->time (sim_callback,
+                                                           (long *) state->Reg[1]);
+             OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+             break;
+
+           case 7:  /* Unlink.  */
+           case 8:  /* Getpid.  */
+           case 9:  /* Kill.  */
+           case 10: /* Fstat.  */
+           case 11: /* Sbrk.  */
+           case 12: /* Argvlen.  */
+           case 13: /* Argv.  */
+           case 14: /* ChDir.  */
+           case 15: /* Stat.  */
+           case 16: /* Chmod.  */
+           case 18: /* Time.  */
+             sim_callback->printf_filtered
+               (sim_callback,
+                "sim: unhandled RedBoot syscall `%d' encountered - "
+                "returning ENOSYS\n",
+                state->Reg[0]);
+             state->Reg[0] = -1;
+             OSptr->ErrorNo = cb_host_to_target_errno
+               (sim_callback, ENOSYS);
+             break;
+           case 1001: /* Meminfo. */
+             {
+               ARMword totmem = state->Reg[1],
+                       topmem = state->Reg[2];
+               ARMword stack = state->MemSize > 0
+                 ? state->MemSize : ADDRUSERSTACK;
+               if (totmem != 0)
+                 ARMul_WriteWord (state, totmem, stack);
+               if (topmem != 0)
+                 ARMul_WriteWord (state, topmem, stack);
+               state->Reg[0] = 0;
+               break;
+             }
+
+           default:
+             sim_callback->printf_filtered
+               (sim_callback,
+                "sim: unknown RedBoot syscall '%d' encountered - ignoring\n",
+                state->Reg[0]);
+             return FALSE;
+           }
+         break;
+       }

       
     default:
       
     default:

-      /* If there is a SWI vector installed use it.  */
-      if (state->is_XScale && saved_number != -1)
-       number = saved_number;
-           
-      if (SWI_vector_installed && number != SWI_Breakpoint)
+      unhandled = TRUE;
+    }
+      
+  if (unhandled)
+    {
+      if (SWI_vector_installed)

        {
          ARMword cpsr;
          ARMword i_size;
        {
          ARMword cpsr;
          ARMword i_size;