gdb/features: remove rx.xml from XMLTOC list

[deliverable/binutils-gdb.git] / sim / bfin / machs.c

diff --git a/sim/bfin/machs.c b/sim/bfin/machs.c
index 04e39b597cabe3dbe4b3083e2f37651ae4fdf89c..0ca836da0ec15dbe8f8831036f405507b8588fc8 100644 (file)
--- a/sim/bfin/machs.c
+++ b/sim/bfin/machs.c
@@ -1,6 +1,6 @@
 /* Simulator for Analog Devices Blackfin processors.
 
 /* Simulator for Analog Devices Blackfin processors.
 

-   Copyright (C) 2005-2012 Free Software Foundation, Inc.
+   Copyright (C) 2005-2020 Free Software Foundation, Inc.

    Contributed by Analog Devices, Inc. and Mike Frysinger.
 
    This file is part of simulators.
    Contributed by Analog Devices, Inc. and Mike Frysinger.
 
    This file is part of simulators.


@@ -29,7 +29,7 @@
 #include "dv-bfin_cec.h"
 #include "dv-bfin_dmac.h"
 
 #include "dv-bfin_cec.h"
 #include "dv-bfin_dmac.h"
 

-static const MACH bfin_mach;
+static const SIM_MACH bfin_mach;

 
 struct bfin_memory_layout {
   address_word addr, len;
 
 struct bfin_memory_layout {
   address_word addr, len;


@@ -1451,7 +1451,7 @@ dv_bfin_hw_port_parse (SIM_DESC sd, const struct bfin_model_data *mdata,
 static void
 bfin_model_hw_tree_init (SIM_DESC sd, SIM_CPU *cpu)
 {
 static void
 bfin_model_hw_tree_init (SIM_DESC sd, SIM_CPU *cpu)
 {

-  const MODEL *model = CPU_MODEL (cpu);
+  const SIM_MODEL *model = CPU_MODEL (cpu);

   const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
   const struct bfin_board_data *board = STATE_BOARD_DATA (sd);
   int mnum = MODEL_NUM (model);
   const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
   const struct bfin_board_data *board = STATE_BOARD_DATA (sd);
   int mnum = MODEL_NUM (model);


@@ -1619,27 +1619,27 @@ static const struct bfrom bf538_roms[] =
 };
 static const struct bfrom bf54x_roms[] =
 {
 };
 static const struct bfrom bf54x_roms[] =
 {

-  BFROM (54x, 4, 0),
-  BFROM (54x, 2, 0),
-  BFROM (54x, 1, 0),
-  BFROM (54x, 0, 0),
-  BFROMA (0xffa14000, 54x_l1, 4, 0),
-  BFROMA (0xffa14000, 54x_l1, 2, 0),
-  BFROMA (0xffa14000, 54x_l1, 1, 0),
-  BFROMA (0xffa14000, 54x_l1, 0, 0),
+  BFROM (54x, 4, 0x1000),
+  BFROM (54x, 2, 0x1000),
+  BFROM (54x, 1, 0x1000),
+  BFROM (54x, 0, 0x1000),
+  BFROMA (0xffa14000, 54x_l1, 4, 0x10000),
+  BFROMA (0xffa14000, 54x_l1, 2, 0x10000),
+  BFROMA (0xffa14000, 54x_l1, 1, 0x10000),
+  BFROMA (0xffa14000, 54x_l1, 0, 0x10000),

   BFROM_STUB,
 };
 static const struct bfrom bf561_roms[] =
 {
   /* XXX: No idea what the actual wrap limit is here.  */
   BFROM_STUB,
 };
 static const struct bfrom bf561_roms[] =
 {
   /* XXX: No idea what the actual wrap limit is here.  */

-  BFROM (561, 5, 0),
+  BFROM (561, 5, 0x1000),

   BFROM_STUB,
 };
 static const struct bfrom bf59x_roms[] =
 {
   BFROM (59x, 1, 0x1000000),
   BFROM (59x, 0, 0x1000000),
   BFROM_STUB,
 };
 static const struct bfrom bf59x_roms[] =
 {
   BFROM (59x, 1, 0x1000000),
   BFROM (59x, 0, 0x1000000),

-  BFROMA (0xffa10000, 59x_l1, 1, 0),
+  BFROMA (0xffa10000, 59x_l1, 1, 0x10000),

   BFROM_STUB,
 };
 
   BFROM_STUB,
 };
 


@@ -1693,7 +1693,7 @@ bfin_model_map_bfrom (SIM_DESC sd, SIM_CPU *cpu)
 void
 bfin_model_cpu_init (SIM_DESC sd, SIM_CPU *cpu)
 {
 void
 bfin_model_cpu_init (SIM_DESC sd, SIM_CPU *cpu)
 {

-  const MODEL *model = CPU_MODEL (cpu);
+  const SIM_MODEL *model = CPU_MODEL (cpu);

   const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
   int mnum = MODEL_NUM (model);
   size_t idx;
   const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
   int mnum = MODEL_NUM (model);
   size_t idx;


@@ -1937,7 +1937,7 @@ bfin_prepare_run (SIM_CPU *cpu)
 {
 }
 
 {
 }
 

-static const MODEL bfin_models[] =
+static const SIM_MODEL bfin_models[] =

 {
 #define P(n) { "bf"#n, & bfin_mach, MODEL_BF##n, NULL, bfin_model_init },
 #include "proc_list.def"
 {
 #define P(n) { "bf"#n, & bfin_mach, MODEL_BF##n, NULL, bfin_model_init },
 #include "proc_list.def"


@@ -1945,13 +1945,13 @@ static const MODEL bfin_models[] =
   { 0, NULL, 0, NULL, NULL, }
 };
 
   { 0, NULL, 0, NULL, NULL, }
 };
 

-static const MACH_IMP_PROPERTIES bfin_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES bfin_imp_properties =

 {
   sizeof (SIM_CPU),
   0,
 };
 
 {
   sizeof (SIM_CPU),
   0,
 };
 

-static const MACH bfin_mach =
+static const SIM_MACH bfin_mach =

 {
   "bfin", "bfin", MACH_BFIN,
   32, 32, & bfin_models[0], & bfin_imp_properties,
 {
   "bfin", "bfin", MACH_BFIN,
   32, 32, & bfin_models[0], & bfin_imp_properties,


@@ -1959,7 +1959,7 @@ static const MACH bfin_mach =
   bfin_prepare_run
 };
 
   bfin_prepare_run
 };
 

-const MACH *sim_machs[] =
+const SIM_MACH *sim_machs[] =

 {
   & bfin_mach,
   NULL
 {
   & bfin_mach,
   NULL