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gdb/features: remove rx.xml from XMLTOC list
[deliverable/binutils-gdb.git]
/
sim
/
bfin
/
machs.c
diff --git
a/sim/bfin/machs.c
b/sim/bfin/machs.c
index 65c434d402a43b3681f62443a4a6beea49870899..0ca836da0ec15dbe8f8831036f405507b8588fc8 100644
(file)
--- a/
sim/bfin/machs.c
+++ b/
sim/bfin/machs.c
@@
-1,6
+1,6
@@
/* Simulator for Analog Devices Blackfin processors.
/* Simulator for Analog Devices Blackfin processors.
- Copyright (C) 2005-20
15
Free Software Foundation, Inc.
+ Copyright (C) 2005-20
20
Free Software Foundation, Inc.
Contributed by Analog Devices, Inc. and Mike Frysinger.
This file is part of simulators.
Contributed by Analog Devices, Inc. and Mike Frysinger.
This file is part of simulators.
@@
-29,7
+29,7
@@
#include "dv-bfin_cec.h"
#include "dv-bfin_dmac.h"
#include "dv-bfin_cec.h"
#include "dv-bfin_dmac.h"
-static const MACH bfin_mach;
+static const
SIM_
MACH bfin_mach;
struct bfin_memory_layout {
address_word addr, len;
struct bfin_memory_layout {
address_word addr, len;
@@
-1451,7
+1451,7
@@
dv_bfin_hw_port_parse (SIM_DESC sd, const struct bfin_model_data *mdata,
static void
bfin_model_hw_tree_init (SIM_DESC sd, SIM_CPU *cpu)
{
static void
bfin_model_hw_tree_init (SIM_DESC sd, SIM_CPU *cpu)
{
- const MODEL *model = CPU_MODEL (cpu);
+ const
SIM_
MODEL *model = CPU_MODEL (cpu);
const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
const struct bfin_board_data *board = STATE_BOARD_DATA (sd);
int mnum = MODEL_NUM (model);
const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
const struct bfin_board_data *board = STATE_BOARD_DATA (sd);
int mnum = MODEL_NUM (model);
@@
-1693,7
+1693,7
@@
bfin_model_map_bfrom (SIM_DESC sd, SIM_CPU *cpu)
void
bfin_model_cpu_init (SIM_DESC sd, SIM_CPU *cpu)
{
void
bfin_model_cpu_init (SIM_DESC sd, SIM_CPU *cpu)
{
- const MODEL *model = CPU_MODEL (cpu);
+ const
SIM_
MODEL *model = CPU_MODEL (cpu);
const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
int mnum = MODEL_NUM (model);
size_t idx;
const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
int mnum = MODEL_NUM (model);
size_t idx;
@@
-1937,7
+1937,7
@@
bfin_prepare_run (SIM_CPU *cpu)
{
}
{
}
-static const MODEL bfin_models[] =
+static const
SIM_
MODEL bfin_models[] =
{
#define P(n) { "bf"#n, & bfin_mach, MODEL_BF##n, NULL, bfin_model_init },
#include "proc_list.def"
{
#define P(n) { "bf"#n, & bfin_mach, MODEL_BF##n, NULL, bfin_model_init },
#include "proc_list.def"
@@
-1945,13
+1945,13
@@
static const MODEL bfin_models[] =
{ 0, NULL, 0, NULL, NULL, }
};
{ 0, NULL, 0, NULL, NULL, }
};
-static const MACH_IMP_PROPERTIES bfin_imp_properties =
+static const
SIM_
MACH_IMP_PROPERTIES bfin_imp_properties =
{
sizeof (SIM_CPU),
0,
};
{
sizeof (SIM_CPU),
0,
};
-static const MACH bfin_mach =
+static const
SIM_
MACH bfin_mach =
{
"bfin", "bfin", MACH_BFIN,
32, 32, & bfin_models[0], & bfin_imp_properties,
{
"bfin", "bfin", MACH_BFIN,
32, 32, & bfin_models[0], & bfin_imp_properties,
@@
-1959,7
+1959,7
@@
static const MACH bfin_mach =
bfin_prepare_run
};
bfin_prepare_run
};
-const MACH *sim_machs[] =
+const
SIM_
MACH *sim_machs[] =
{
& bfin_mach,
NULL
{
& bfin_mach,
NULL
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