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gas: run the hwcaps-bump tests with 64-bit sparc objects only.
[deliverable/binutils-gdb.git] / sim / common / cgen-par.c
diff --git a/sim/common/cgen-par.c b/sim/common/cgen-par.c
index fece2c9f11fb8f5cb5a84205dfcc33f7b096b69f..ced035b34d3ea69bdd6a79855af37a8630eaf4c8 100644 (file)
--- a/sim/common/cgen-par.c
+++ b/sim/common/cgen-par.c
@@ -1,22 +1,21 @@
 /* Simulator parallel routines for CGEN simulators (and maybe others).
 /* Simulator parallel routines for CGEN simulators (and maybe others).
-   Copyright (C) 1999 Free Software Foundation, Inc.
+   Copyright (C) 1999-2016 Free Software Foundation, Inc.
    Contributed by Cygnus Solutions.
 
 This file is part of the GNU instruction set simulator.
 
 This program is free software; you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by
    Contributed by Cygnus Solutions.
 
 This file is part of the GNU instruction set simulator.
 
 This program is free software; you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
 
 This program is distributed in the hope that it will be useful,
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
 
 This program is distributed in the hope that it will be useful,
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 #include "sim-main.h"
 #include "cgen-mem.h"
 
 #include "sim-main.h"
 #include "cgen-mem.h"
@@ -93,7 +92,7 @@ void sim_queue_fn_si_write (
   SIM_CPU *cpu,
   void (*write_function)(SIM_CPU *cpu, UINT, USI),
   UINT regno,
   SIM_CPU *cpu,
   void (*write_function)(SIM_CPU *cpu, UINT, USI),
   UINT regno,
-  SI value
+  USI value
 )
 {
   CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
 )
 {
   CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
@@ -105,6 +104,22 @@ void sim_queue_fn_si_write (
   element->kinds.fn_si_write.value = value;
 }
 
   element->kinds.fn_si_write.value = value;
 }
 
+void sim_queue_fn_sf_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, UINT, SF),
+  UINT regno,
+  SF value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_SF_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_sf_write.function = write_function;
+  element->kinds.fn_sf_write.regno = regno;
+  element->kinds.fn_sf_write.value = value;
+}
+
 void sim_queue_fn_di_write (
   SIM_CPU *cpu,
   void (*write_function)(SIM_CPU *cpu, UINT, DI),
 void sim_queue_fn_di_write (
   SIM_CPU *cpu,
   void (*write_function)(SIM_CPU *cpu, UINT, DI),
@@ -142,7 +157,7 @@ void sim_queue_fn_xi_write (
 
 void sim_queue_fn_df_write (
   SIM_CPU *cpu,
 
 void sim_queue_fn_df_write (
   SIM_CPU *cpu,
-  void (*write_function)(SIM_CPU *cpu, UINT, DI),
+  void (*write_function)(SIM_CPU *cpu, UINT, DF),
   UINT regno,
   DF value
 )
   UINT regno,
   DF value
 )
@@ -233,6 +248,105 @@ void sim_queue_mem_xi_write (SIM_CPU *cpu, SI address, SI *value)
   element->kinds.mem_xi_write.value[3] = value[3];
 }
 
   element->kinds.mem_xi_write.value[3] = value[3];
 }
 
+void sim_queue_fn_mem_qi_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, QI),
+  SI address,
+  QI value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_QI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_qi_write.function = write_function;
+  element->kinds.fn_mem_qi_write.address = address;
+  element->kinds.fn_mem_qi_write.value   = value;
+}
+
+void sim_queue_fn_mem_hi_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, HI),
+  SI address,
+  HI value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_HI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_hi_write.function = write_function;
+  element->kinds.fn_mem_hi_write.address = address;
+  element->kinds.fn_mem_hi_write.value   = value;
+}
+
+void sim_queue_fn_mem_si_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, SI),
+  SI address,
+  SI value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_SI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_si_write.function = write_function;
+  element->kinds.fn_mem_si_write.address = address;
+  element->kinds.fn_mem_si_write.value   = value;
+}
+
+void sim_queue_fn_mem_di_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, DI),
+  SI address,
+  DI value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_DI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_di_write.function = write_function;
+  element->kinds.fn_mem_di_write.address = address;
+  element->kinds.fn_mem_di_write.value   = value;
+}
+
+void sim_queue_fn_mem_df_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, DF),
+  SI address,
+  DF value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_DF_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_df_write.function = write_function;
+  element->kinds.fn_mem_df_write.address = address;
+  element->kinds.fn_mem_df_write.value   = value;
+}
+
+void sim_queue_fn_mem_xi_write (
+  SIM_CPU *cpu,
+  void (*write_function)(SIM_CPU *cpu, IADDR, SI, SI *),
+  SI address,
+  SI *value
+)
+{
+  CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+  CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+  element->kind = CGEN_FN_MEM_XI_WRITE;
+  element->insn_address = CPU_PC_GET (cpu);
+  element->kinds.fn_mem_xi_write.function = write_function;
+  element->kinds.fn_mem_xi_write.address = address;
+  element->kinds.fn_mem_xi_write.value[0] = value[0];
+  element->kinds.fn_mem_xi_write.value[1] = value[1];
+  element->kinds.fn_mem_xi_write.value[2] = value[2];
+  element->kinds.fn_mem_xi_write.value[3] = value[3];
+}
+
 /* Execute a write stored on the write queue.  */
 void
 cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
 /* Execute a write stored on the write queue.  */
 void
 cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
@@ -265,6 +379,11 @@ cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
                                        item->kinds.fn_si_write.regno,
                                        item->kinds.fn_si_write.value);
       break;
                                        item->kinds.fn_si_write.regno,
                                        item->kinds.fn_si_write.value);
       break;
+    case CGEN_FN_SF_WRITE:
+      item->kinds.fn_sf_write.function (cpu,
+                                       item->kinds.fn_sf_write.regno,
+                                       item->kinds.fn_sf_write.value);
+      break;
     case CGEN_FN_DI_WRITE:
       item->kinds.fn_di_write.function (cpu,
                                        item->kinds.fn_di_write.regno,
     case CGEN_FN_DI_WRITE:
       item->kinds.fn_di_write.function (cpu,
                                        item->kinds.fn_di_write.regno,
@@ -319,7 +438,44 @@ cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
       SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 12,
                item->kinds.mem_xi_write.value[3]);
       break;
       SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 12,
                item->kinds.mem_xi_write.value[3]);
       break;
+    case CGEN_FN_MEM_QI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_qi_write.function (cpu, pc,
+                                           item->kinds.fn_mem_qi_write.address,
+                                           item->kinds.fn_mem_qi_write.value);
+      break;
+    case CGEN_FN_MEM_HI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_hi_write.function (cpu, pc,
+                                           item->kinds.fn_mem_hi_write.address,
+                                           item->kinds.fn_mem_hi_write.value);
+      break;
+    case CGEN_FN_MEM_SI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_si_write.function (cpu, pc,
+                                           item->kinds.fn_mem_si_write.address,
+                                           item->kinds.fn_mem_si_write.value);
+      break;
+    case CGEN_FN_MEM_DI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_di_write.function (cpu, pc,
+                                           item->kinds.fn_mem_di_write.address,
+                                           item->kinds.fn_mem_di_write.value);
+      break;
+    case CGEN_FN_MEM_DF_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_df_write.function (cpu, pc,
+                                           item->kinds.fn_mem_df_write.address,
+                                           item->kinds.fn_mem_df_write.value);
+      break;
+    case CGEN_FN_MEM_XI_WRITE:
+      pc = item->insn_address;
+      item->kinds.fn_mem_xi_write.function (cpu, pc,
+                                           item->kinds.fn_mem_xi_write.address,
+                                           item->kinds.fn_mem_xi_write.value);
+      break;
     default:
     default:
+      abort ();
       break; /* FIXME: for now....print message later.  */
     }
 }
       break; /* FIXME: for now....print message later.  */
     }
 }
GDB Binutils - Deliverables
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