+
+#if EXTERN_SIM_CORE_P
+unsigned
+sim_core_xor_read_buffer (SIM_DESC sd,
+ sim_cpu *cpu,
+ unsigned map,
+ void *buffer,
+ address_word addr,
+ unsigned nr_bytes)
+{
+ address_word byte_xor
+ = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->byte_xor[0]);
+ if (!WITH_XOR_ENDIAN || !byte_xor)
+ return sim_core_read_buffer (sd, cpu, map, buffer, addr, nr_bytes);
+ else
+ /* only break up transfers when xor-endian is both selected and enabled */
+ {
+ unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */
+ unsigned nr_transfered = 0;
+ address_word start = addr;
+ unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
+ address_word stop;
+ /* initial and intermediate transfers are broken when they cross
+ an XOR endian boundary */
+ while (nr_transfered + nr_this_transfer < nr_bytes)
+ /* initial/intermediate transfers */
+ {
+ /* since xor-endian is enabled stop^xor defines the start
+ address of the transfer */
+ stop = start + nr_this_transfer - 1;
+ SIM_ASSERT (start <= stop);
+ SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
+ if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
+ != nr_this_transfer)
+ return nr_transfered;
+ reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
+ nr_transfered += nr_this_transfer;
+ nr_this_transfer = WITH_XOR_ENDIAN;
+ start = stop + 1;
+ }
+ /* final transfer */
+ nr_this_transfer = nr_bytes - nr_transfered;
+ stop = start + nr_this_transfer - 1;
+ SIM_ASSERT (stop == (addr + nr_bytes - 1));
+ if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
+ != nr_this_transfer)
+ return nr_transfered;
+ reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
+ return nr_bytes;
+ }
+}
+#endif
+
+
+#if EXTERN_SIM_CORE_P
+unsigned
+sim_core_xor_write_buffer (SIM_DESC sd,
+ sim_cpu *cpu,
+ unsigned map,
+ const void *buffer,
+ address_word addr,
+ unsigned nr_bytes)
+{
+ address_word byte_xor
+ = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->byte_xor[0]);
+ if (!WITH_XOR_ENDIAN || !byte_xor)
+ return sim_core_write_buffer (sd, cpu, map, buffer, addr, nr_bytes);
+ else
+ /* only break up transfers when xor-endian is both selected and enabled */
+ {
+ unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero sized array */
+ unsigned nr_transfered = 0;
+ address_word start = addr;
+ unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
+ address_word stop;
+ /* initial and intermediate transfers are broken when they cross
+ an XOR endian boundary */
+ while (nr_transfered + nr_this_transfer < nr_bytes)
+ /* initial/intermediate transfers */
+ {
+ /* since xor-endian is enabled stop^xor defines the start
+ address of the transfer */
+ stop = start + nr_this_transfer - 1;
+ SIM_ASSERT (start <= stop);
+ SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
+ reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
+ if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
+ != nr_this_transfer)
+ return nr_transfered;
+ nr_transfered += nr_this_transfer;
+ nr_this_transfer = WITH_XOR_ENDIAN;
+ start = stop + 1;
+ }
+ /* final transfer */
+ nr_this_transfer = nr_bytes - nr_transfered;
+ stop = start + nr_this_transfer - 1;
+ SIM_ASSERT (stop == (addr + nr_bytes - 1));
+ reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
+ if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
+ != nr_this_transfer)
+ return nr_transfered;
+ return nr_bytes;
+ }
+}
+#endif
+
+#if EXTERN_SIM_CORE_P
+void *
+sim_core_trans_addr (SIM_DESC sd,
+ sim_cpu *cpu,
+ unsigned map,
+ address_word addr)
+{
+ sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
+ sim_core_mapping *mapping =
+ sim_core_find_mapping (core, map,
+ addr, /*nr-bytes*/1,
+ write_transfer,
+ 0 /*dont-abort*/, NULL, NULL_CIA);
+ if (mapping == NULL)
+ return NULL;
+ return sim_core_translate (mapping, addr);
+}
+#endif
+
+
+
+/* define the read/write 1/2/4/8/16/word functions */
+
+#define N 16