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Regenerate configure in sim
[deliverable/binutils-gdb.git]
/
sim
/
cris
/
traps.c
diff --git
a/sim/cris/traps.c
b/sim/cris/traps.c
index ab25d17aa9d64f173240ad94f019a3b9458627b7..0feba2e0dc849dda11f8bfb711bd3d5bd49967df 100644
(file)
--- a/
sim/cris/traps.c
+++ b/
sim/cris/traps.c
@@
-1,6
+1,5
@@
/* CRIS exception, interrupt, and trap (EIT) support
/* CRIS exception, interrupt, and trap (EIT) support
- Copyright (C) 2004, 2005, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 2004-2015 Free Software Foundation, Inc.
Contributed by Axis Communications.
This file is part of the GNU simulators.
Contributed by Axis Communications.
This file is part of the GNU simulators.
@@
-2205,7
+2204,7
@@
cris_break_13_handler (SIM_CPU *current_cpu, USI callnum, USI arg1,
|| ((events = sim_core_read_unaligned_2 (current_cpu, pc,
0, ufds + 4))
!= TARGET_POLLIN)
|| ((events = sim_core_read_unaligned_2 (current_cpu, pc,
0, ufds + 4))
!= TARGET_POLLIN)
- || ((cb->fstat) (cb, fd, &buf) != 0
+ || ((cb->
to_
fstat) (cb, fd, &buf) != 0
|| (buf.st_mode & S_IFIFO) == 0)
|| current_cpu->thread_data == NULL)
{
|| (buf.st_mode & S_IFIFO) == 0)
|| current_cpu->thread_data == NULL)
{
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