+static int
+model_m32rx_sth_plus (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
+ referenced |= 1 << 0;
+ referenced |= 1 << 1;
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
+ }
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_src2);
+ out_dr = FLD (out_src2);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_stb_plus (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
+ referenced |= 1 << 0;
+ referenced |= 1 << 1;
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
+ }
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_src2);
+ out_dr = FLD (out_src2);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+