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config: Sync with GCC
[deliverable/binutils-gdb.git]
/
sim
/
m68hc11
/
dv-m68hc11spi.c
diff --git
a/sim/m68hc11/dv-m68hc11spi.c
b/sim/m68hc11/dv-m68hc11spi.c
index 71338d1b0d9e4b880aa2ac9c2d633169b4b43ccc..e3ba278c9746df6d8d7a0eae7a0827d5434d36f6 100644
(file)
--- a/
sim/m68hc11/dv-m68hc11spi.c
+++ b/
sim/m68hc11/dv-m68hc11spi.c
@@
-1,6
+1,5
@@
/* dv-m68hc11spi.c -- Simulation of the 68HC11 SPI
/* dv-m68hc11spi.c -- Simulation of the 68HC11 SPI
- Copyright (C) 2000, 2002, 2003, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 2000-2018 Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
(From a driver model Contributed by Cygnus Solutions.)
Written by Stephane Carrez (stcarrez@nerim.fr)
(From a driver model Contributed by Cygnus Solutions.)
@@
-157,7
+156,7
@@
m68hc11spi_port_event (struct hw *me,
{
SIM_DESC sd;
struct m68hc11spi *controller;
{
SIM_DESC sd;
struct m68hc11spi *controller;
- sim_cpu
*
cpu;
+ sim_cpu
*
cpu;
unsigned8 val;
controller = hw_data (me);
unsigned8 val;
controller = hw_data (me);
@@
-235,7
+234,7
@@
set_bit_port (struct hw *me, sim_cpu *cpu, int port, int mask, int value)
#define SPI_START_BIT 1
#define SPI_MIDDLE_BIT 2
#define SPI_START_BIT 1
#define SPI_MIDDLE_BIT 2
-void
+
static
void
m68hc11spi_clock (struct hw *me, void *data)
{
SIM_DESC sd;
m68hc11spi_clock (struct hw *me, void *data)
{
SIM_DESC sd;
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