- /* make words host-endian */
- input[0] = T2H_4(input[0]);
- /* we may ignore other words */
-
- /* handle writes to individual registers; clear `writeable' on error */
- switch(reg_num)
- {
- case PKE_REG_FBRST:
- /* Order these tests from least to most overriding, in case
- multiple bits are set. */
- if(BIT_MASK_GET(input[0], PKE_REG_FBRST_STC_B, PKE_REG_FBRST_STC_E))
- {
- /* clear a bunch of status bits */
- PKE_REG_MASK_SET(me, STAT, PSS, 0);
- PKE_REG_MASK_SET(me, STAT, PFS, 0);
- PKE_REG_MASK_SET(me, STAT, PIS, 0);
- PKE_REG_MASK_SET(me, STAT, INT, 0);
- PKE_REG_MASK_SET(me, STAT, ER0, 0);
- PKE_REG_MASK_SET(me, STAT, ER1, 0);
- me->flags &= ~PKE_FLAG_PENDING_PSS;
- /* will allow resumption of possible stalled instruction */
- }
- if(BIT_MASK_GET(input[0], PKE_REG_FBRST_STP_B, PKE_REG_FBRST_STP_E))
- {
- me->flags |= PKE_FLAG_PENDING_PSS;
- }
- if(BIT_MASK_GET(input[0], PKE_REG_FBRST_FBK_B, PKE_REG_FBRST_FBK_E))
- {
- PKE_REG_MASK_SET(me, STAT, PFS, 1);
- }
- if(BIT_MASK_GET(input[0], PKE_REG_FBRST_RST_B, PKE_REG_FBRST_RST_E))
- {
- pke_reset(me);
- }
- break;
-
- case PKE_REG_ERR:
- /* copy bottom three bits */
- BIT_MASK_SET(me->regs[PKE_REG_ERR][0], 0, 2, BIT_MASK_GET(input[0], 0, 2));
- break;
-
- case PKE_REG_MARK:
- /* copy bottom sixteen bits */
- PKE_REG_MASK_SET(me, MARK, MARK, BIT_MASK_GET(input[0], 0, 15));
- /* reset MRK bit in STAT */
- PKE_REG_MASK_SET(me, STAT, MRK, 0);
- break;
-
- /* handle common case of read-only registers */
- /* PKE1-only registers - not really necessary to handle separately */
- case PKE_REG_BASE:
- case PKE_REG_OFST:
- case PKE_REG_TOPS:
- case PKE_REG_TOP:
- case PKE_REG_DBF:
- if(me->pke_number == 0)
- writeable = 0;
- /* fall through */
- /* PKE0 & PKE1 common registers*/
- case PKE_REG_STAT:
- /* ignore FDR bit for PKE1_STAT -- simulator does not implement PKE->RAM transfers */
- case PKE_REG_CYCLE:
- case PKE_REG_MODE:
- case PKE_REG_NUM:
- case PKE_REG_MASK:
- case PKE_REG_CODE:
- case PKE_REG_ITOPS:
- case PKE_REG_ITOP:
- case PKE_REG_R0:
- case PKE_REG_R1:
- case PKE_REG_R2:
- case PKE_REG_R3:
- case PKE_REG_C0:
- case PKE_REG_C1:
- case PKE_REG_C2:
- case PKE_REG_C3:
- writeable = 0;
- break;
-
- default:
- ASSERT(0); /* test above should prevent this possibility */
- }
-
- /* perform return */
- if(! writeable)
- {
- ; /* error */
- }
-