- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_make_int_reg_busy(model_ptr, busy_ptr, ppc_RD);
- model_make_cr_reg_busy(model_ptr, busy_ptr, 0);
- return;
- }
-
-# Schedule an instruction that takes 2 integer input registers and produces an output register & updates a second register
-void::model-function::ppc_insn_int2_update:itable_index index, cpu *processor, model_data *model_ptr, signed_word *rD, signed_word *rA, signed_word *rB
- if (!WITH_MODEL_ISSUE)
- return;
-
- else {
- registers *cpu_regs = cpu_registers(processor);
- const unsigned ppc_RA = (rA - &cpu_regs->gpr[0]);
- const unsigned ppc_RB = (rB - &cpu_regs->gpr[0]);
- const unsigned ppc_RD = (rD - &cpu_regs->gpr[0]);
- const unsigned32 int_mask = (1 << ppc_RA) | (1 << ppc_RB) | (1 << ppc_RD);
- model_busy *busy_ptr;
-
- if ((model_ptr->int_busy & int_mask) != 0) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->int_busy & int_mask) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, 0, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_make_int_reg_busy(model_ptr, busy_ptr, ppc_RA);
- model_make_int_reg_busy(model_ptr, busy_ptr, ppc_RD);
- }
-
-# Schedule an instruction that takes 1 integer input registers and produces an output register & updates the other register
-void::model-function::ppc_insn_int1_update:itable_index index, cpu *processor, model_data *model_ptr, signed_word *rD, signed_word *rA
- if (!WITH_MODEL_ISSUE)
- return;
-
- else {
- registers *cpu_regs = cpu_registers(processor);
- const unsigned ppc_RA = (rA - &cpu_regs->gpr[0]);
- const unsigned ppc_RD = (rD - &cpu_regs->gpr[0]);
- const unsigned32 int_mask = (1 << ppc_RA) | (1 << ppc_RD);
- model_busy *busy_ptr;
-
- if ((model_ptr->int_busy & int_mask) != 0) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->int_busy & int_mask) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, 0, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_make_int_reg_busy(model_ptr, busy_ptr, ppc_RA);
- model_make_int_reg_busy(model_ptr, busy_ptr, ppc_RD);
- }
-
-# Schedule an instruction that takes 2 integer input registers and produces no output register
-void::model-function::ppc_insn_int2_noout:itable_index index, cpu *processor, model_data *model_ptr, signed_word *rA, signed_word *rB
- if (!WITH_MODEL_ISSUE)
- return;
-
- else {
- registers *cpu_regs = cpu_registers(processor);
- const unsigned ppc_RA = (rA - &cpu_regs->gpr[0]);
- const unsigned ppc_RB = (rB - &cpu_regs->gpr[0]);
- const unsigned32 int_mask = (1 << ppc_RA) | (1 << ppc_RB);
-
- if ((model_ptr->int_busy & int_mask) != 0) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->int_busy & int_mask) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, 0, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- (void) model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- }
-
-# Schedule an instruction that takes 1 integer input registers and produces no output register
-void::model-function::ppc_insn_int1_noout:itable_index index, cpu *processor, model_data *model_ptr, signed_word *rA
- if (!WITH_MODEL_ISSUE)
- return;
-
- else {
- registers *cpu_regs = cpu_registers(processor);
- const unsigned ppc_RA = (rA - &cpu_regs->gpr[0]);
- const unsigned32 int_mask = (1 << ppc_RA);
-
- if ((model_ptr->int_busy & int_mask) != 0) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->int_busy & int_mask) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, 0, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- (void) model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- }
-
-# Schedule an instruction that takes no input registers and produces no output
-void::model-function::ppc_insn_int0_noout:itable_index index, cpu *processor, model_data *model_ptr
- if (!WITH_MODEL_ISSUE)
- return;
-
- else {
- (void) model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- }
-
-# Schedule an instruction that takes 2 integer input registers and produces a CR output register
-void::model-function::ppc_insn_int2_cr:itable_index index, cpu *processor, model_data *model_ptr, unsigned CRD, signed_word *rA, signed_word *rB
- if (!WITH_MODEL_ISSUE)
- return;
-
- else {
- registers *cpu_regs = cpu_registers(processor);
- const unsigned ppc_RA = (rA - &cpu_regs->gpr[0]);
- const unsigned ppc_RB = (rB - &cpu_regs->gpr[0]);
- const unsigned32 int_mask = (1 << ppc_RA) | (1 << ppc_RB);
- const unsigned32 cr_mask = (1 << CRD);
- model_busy *busy_ptr;
-
- if ((model_ptr->int_busy & int_mask) || (model_ptr->cr_fpscr_busy & cr_mask)) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->int_busy & int_mask) || (model_ptr->cr_fpscr_busy & cr_mask)) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, cr_mask, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }