+1998-12-14 Doug Evans <devans@casey.cygnus.com>
+
+ * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
+ errors. Translate \n sequences in expected output to newline char.
+ (slurp_options): Make parentheses optional.
+ (sim_run): Look for board_info sim,options.
+ * sim/fr30/hello.ms: Add trailing \n to expected output.
+ * sim/m32r/hello.ms: Ditto.
+ * sim/m32r/hw-trap.ms: Ditto.
+
+ * sim/m32r/trap.cgs: Properly align trap2_handler.
+
+ * sim/m32r/uread16.ms: New testcase.
+ * sim/m32r/uread32.ms: New testcase.
+ * sim/m32r/uwrite16.ms: New testcase.
+ * sim/m32r/uwrite32.ms: New testcase.
+
+1998-12-14 Dave Brolley <brolley@cygnus.com>
+
+ * sim/fr30/call.cgs: Test ret here as well.
+ * sim/fr30/ld.cgs: Remove bogus comment.
+ * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
+ * sim/fr30/div.ms: New testcase.
+ * sim/fr30/st.cgs: New testcase.
+ * sim/fr30/sth.cgs: New testcase.
+ * sim/fr30/stb.cgs: New testcase.
+ * sim/fr30/mov.cgs: New testcase.
+ * sim/fr30/jmp.cgs: New testcase.
+ * sim/fr30/ret.cgs: New testcase.
+ * sim/fr30/int.cgs: New testcase.
+
+Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>
+
+ * sim/fr30/div0s.cgs: New testcase.
+ * sim/fr30/div0u.cgs: New testcase.
+ * sim/fr30/div1.cgs: New testcase.
+ * sim/fr30/div2.cgs: New testcase.
+ * sim/fr30/div3.cgs: New testcase.
+ * sim/fr30/div4s.cgs: New testcase.
+ * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
+
+Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com>
+
+ * sim/fr30/testutils.inc (set_s_user): Correct Mask.
+ (set_s_system): Correct Mask.
+ * sim/fr30/ld.cgs (ld): Move previously failing test back
+ into place.
+ * sim/fr30/ldm0.cgs: New testcase.
+ * sim/fr30/ldm1.cgs: New testcase.
+ * sim/fr30/stm0.cgs: New testcase.
+ * sim/fr30/stm1.cgs: New testcase.
+
+Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com>
+
+ * sim/fr30/ld.cgs: Implement more loads.
+ * sim/fr30/call.cgs: New testcase.
+ * sim/fr30/testutils.inc (testr_h_dr): New macro.
+ (set_s_user,set_s_system): New macros.
+
+ * sim/fr30: New Directory.
+
+Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
+ recent sim/common/sim-basics.h changes.
+ * common/Makefile.in: Update.
+
+Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
+
+ * lib/sim-defs.exp (sim_run): download target program to remote
+ host, if necessary. for unix-driven win32 testing.
+
+start-sanitize-sky
+Thu Oct 29 14:10:22 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * sim/sky/sky-defs.tcl: xfail certain tests due to changes in
+ constant value of VU register VF00yz.
+
+Tue Oct 13 13:01:24 EDT 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * sim/sky/t-cop2.*: Update tests for VRNEXT and VRGET
+ instructions, to match corrected operand synatx.
+
+Wed Sep 23 12:05:11 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * sim/sky/level2_gen.pl (*): Converted some perl constructs to use
+ only perl 4 features. Remove junk whitespace before calling split()
+ for compatibility.
+
+Fri Sep 18 15:16:56 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * sim/sky/vu01reg-main.c (validate_ctrl): Only test bits of
+ statusflag that we're allowed to set.
+ * sim/sky/vu01reg.dvpasm (vumain1_ctrl): Set statusflag to 0xa80.
+
+Fri Sep 18 14:52:00 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * sim/sky/level2_gen.pl (conv_vuasm): Convert incoming .float
+ constants to .word in perl to avoid gas processing.
+
+Fri Sep 18 13:16:21 EDT 1998 Jim Lemke <jlemke@cygnus.com>
+
+ * sim/sky/t-dma.dmaexpect: Modified last line to expect that
+ DMA_Dn_CHCR__DIR be set to "1". Change required because of pr17171.
+
+Thu Sep 17 17:30:42 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * sim/sky/level2_gen.pl (conv_vuasm): Handle DC.F construct
+ in parallel with lower VU insn.
+
+Wed Sep 16 15:12:38 EDT 1998 Jim Lemke <jlemke@cygnus.com>
+
+ * sim/sky/sce_main.c (DMA_Dn_CHCR__{STR,TTE,MODE}: cleanup.
+
+Tue Sep 15 17:32:29 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * sim/sky/level2_gen.pl (conv_vuasm): Support data segment
+ label addresses for ADDI instruction.
+
+Tue Sep 15 09:56:59 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * sim/sky/rw-vureg.c: Check that attempts to overwrite constant
+ VU registers (VF0, VI0) are futile.
+
+ * sim/sky/sky-defs.tcl (run_l2s_test): Clean up all files left
+ behind by level2_gen.pl for passing level-2 test cases.
+
+ * sim/sky/t-cop2.vuexpect: Update to match slightly changed
+ disassembly format from sky-libvpe.
+
+Tue Sep 15 01:08:40 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * sim/sky/vu01reg-main.c: Test vu1 control reg access.
+ * sim/sky/vu01reg.dvpasm: Ditto.
+
+Mon Sep 14 20:30:34 EDT 1998 Jim Lemke <jlemke@cygnus.com>
+
+ * sim/sky/dma.h (DMA_Dn_CHCR__{STR,TTE,MODE}: cleanup.
+ * sim/sky/vu01reg-main.c: as above
+ * sim/sky/vureloc-main.c: as above
+ * sim/sky/t-int.c: Change setting of DMA DIRection flag.
+
+Mon Sep 14 15:33:15 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * sim/sky/dma.h (DMA_Dn_CHCR__{START,TIE,MODE}): New macros.
+ (DMA_Dn_CHCR__{MODE_NORM,MODE_CHAIN,DIR}): New macros.
+ * sim/sky/vu01reg-main.c: Specify DMA_Dn_CHCR__DIR.
+ * sim/sky/vureloc.c: Specify DMA_Dn_CHCR__DIR.
+ * sim/sky/sce_main.c: DMA_Dn_CHCR__START renamed from ...__DMA_START.
+
+ * sim/sky/sky-defs.tcl (run_trc_test): Save old timeout before
+ clobbering it.
+ (run_brn_test): Set default timeout of 500 seconds.
+
+end-sanitize-sky
+Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
+ * sim/m32r/rte.cgs: Test bbpc,bbpsw.
+ * sim/m32r/trap.cgs: Test bbpc,bbpsw.
+