+1998-12-14 Doug Evans <devans@casey.cygnus.com>
+
+ * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
+ errors. Translate \n sequences in expected output to newline char.
+ (slurp_options): Make parentheses optional.
+ (sim_run): Look for board_info sim,options.
+ * sim/fr30/hello.ms: Add trailing \n to expected output.
+ * sim/m32r/hello.ms: Ditto.
+ * sim/m32r/hw-trap.ms: Ditto.
+
+ * sim/m32r/trap.cgs: Properly align trap2_handler.
+
+ * sim/m32r/uread16.ms: New testcase.
+ * sim/m32r/uread32.ms: New testcase.
+ * sim/m32r/uwrite16.ms: New testcase.
+ * sim/m32r/uwrite32.ms: New testcase.
+
+1998-12-14 Dave Brolley <brolley@cygnus.com>
+
+ * sim/fr30/call.cgs: Test ret here as well.
+ * sim/fr30/ld.cgs: Remove bogus comment.
+ * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
+ * sim/fr30/div.ms: New testcase.
+ * sim/fr30/st.cgs: New testcase.
+ * sim/fr30/sth.cgs: New testcase.
+ * sim/fr30/stb.cgs: New testcase.
+ * sim/fr30/mov.cgs: New testcase.
+ * sim/fr30/jmp.cgs: New testcase.
+ * sim/fr30/ret.cgs: New testcase.
+ * sim/fr30/int.cgs: New testcase.
+
+Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>
+
+ * sim/fr30/div0s.cgs: New testcase.
+ * sim/fr30/div0u.cgs: New testcase.
+ * sim/fr30/div1.cgs: New testcase.
+ * sim/fr30/div2.cgs: New testcase.
+ * sim/fr30/div3.cgs: New testcase.
+ * sim/fr30/div4s.cgs: New testcase.
+ * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
+