arm: dts: qcom: apq8064: Add RPMCC DT node

[deliverable/linux.git] / arch / arm / boot / dts / qcom-apq8064.dtsi

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index a72e1226372b1bef61c80c2f70140e2913c6f20d..394c43bf0ae7a6db4ea3a5e190801f34269f844a 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -91,6 +91,26 @@
                interrupts = <1 10 0x304>;
        };
 
+       clocks {
+               cxo_board {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <19200000>;
+               };
+
+               pxo_board {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <27000000>;
+               };
+
+               sleep_clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
+       };
+
        sfpb_mutex: hwmutex {
                compatible = "qcom,sfpb-mutex";
                syscon = <&sfpb_wrapper_mutex 0x604 0x4>;
@@ -320,6 +340,28 @@
                        };
                };
 
+               gsbi5: gsbi@1a200000 {
+                       status = "disabled";
+                       compatible = "qcom,gsbi-v1.0.0";
+                       cell-index = <5>;
+                       reg = <0x1a200000 0x03>;
+                       clocks = <&gcc GSBI5_H_CLK>;
+                       clock-names = "iface";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       gsbi5_serial: serial@1a240000 {
+                               compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+                               reg = <0x1a240000 0x100>,
+                                     <0x1a200000 0x03>;
+                               interrupts = <0 154 0x0>;
+                               clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
+                               clock-names = "core", "iface";
+                               status = "disabled";
+                       };
+               };
+
                gsbi6: gsbi@16500000 {
                        status = "disabled";
                        compatible = "qcom,gsbi-v1.0.0";
@@ -388,7 +430,8 @@
 
                                pm8921_gpio: gpio@150 {
 
-                                       compatible = "qcom,pm8921-gpio";
+                                       compatible = "qcom,pm8921-gpio",
+                                                    "qcom,ssbi-gpio";
                                        reg = <0x150>;
                                        interrupts = <192 1>, <193 1>, <194 1>,
                                                     <195 1>, <196 1>, <197 1>,
@@ -412,7 +455,8 @@
                                };
 
                                pm8921_mpps: mpps@50 {
-                                       compatible = "qcom,pm8921-mpp";
+                                       compatible = "qcom,pm8921-mpp",
+                                                    "qcom,ssbi-mpp";
                                        reg = <0x50>;
                                        gpio-controller;
                                        #gpio-cells = <2>;
@@ -477,12 +521,63 @@
                                          <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
                        interrupt-names = "ack", "err", "wakeup";
 
+                       rpmcc: clock-controller {
+                               compatible      = "qcom,rpmcc-apq8064", "qcom,rpmcc";
+                               #clock-cells = <1>;
+                       };
+
                        regulators {
                                compatible = "qcom,rpm-pm8921-regulators";
 
+                               pm8921_s1: s1 {};
+                               pm8921_s2: s2 {};
+                               pm8921_s3: s3 {};
+                               pm8921_s4: s4 {};
+                               pm8921_s7: s7 {};
+                               pm8921_s8: s8 {};
+
+                               pm8921_l1: l1 {};
+                               pm8921_l2: l2 {};
+                               pm8921_l3: l3 {};
+                               pm8921_l4: l4 {};
+                               pm8921_l5: l5 {};
+                               pm8921_l6: l6 {};
+                               pm8921_l7: l7 {};
+                               pm8921_l8: l8 {};
+                               pm8921_l9: l9 {};
+                               pm8921_l10: l10 {};
+                               pm8921_l11: l11 {};
+                               pm8921_l12: l12 {};
+                               pm8921_l14: l14 {};
+                               pm8921_l15: l15 {};
+                               pm8921_l16: l16 {};
+                               pm8921_l17: l17 {};
+                               pm8921_l18: l18 {};
+                               pm8921_l21: l21 {};
+                               pm8921_l22: l22 {};
+                               pm8921_l23: l23 {};
+                               pm8921_l24: l24 {};
+                               pm8921_l25: l25 {};
+                               pm8921_l26: l26 {};
+                               pm8921_l27: l27 {};
+                               pm8921_l28: l28 {};
+                               pm8921_l29: l29 {};
+
+                               pm8921_lvs1: lvs1 {};
+                               pm8921_lvs2: lvs2 {};
+                               pm8921_lvs3: lvs3 {};
+                               pm8921_lvs4: lvs4 {};
+                               pm8921_lvs5: lvs5 {};
+                               pm8921_lvs6: lvs6 {};
+                               pm8921_lvs7: lvs7 {};
+
+                               pm8921_usb_switch: usb-switch {};
+
                                pm8921_hdmi_switch: hdmi-switch {
                                        bias-pull-down;
                                };
+
+                               pm8921_ncp: ncp {};
                        };
                };
 
@@ -695,5 +790,41 @@
                        compatible = "qcom,tcsr-apq8064", "syscon";
                        reg = <0x1a400000 0x100>;
                };
+
+               pcie: pci@1b500000 {
+                       compatible = "qcom,pcie-apq8064", "snps,dw-pcie";
+                       reg = <0x1b500000 0x1000
+                              0x1b502000 0x80
+                              0x1b600000 0x100
+                              0x0ff00000 0x100000>;
+                       reg-names = "dbi", "elbi", "parf", "config";
+                       device_type = "pci";
+                       linux,pci-domain = <0>;
+                       bus-range = <0x00 0xff>;
+                       num-lanes = <1>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000   /* I/O */
+                                 0x82000000 0 0 0x08000000 0 0x07e00000>; /* memory */
+                       interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
+                       interrupt-names = "msi";
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 0x7>;
+                       interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+                                       <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+                                       <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+                                       <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+                       clocks = <&gcc PCIE_A_CLK>,
+                                <&gcc PCIE_H_CLK>,
+                                <&gcc PCIE_PHY_REF_CLK>;
+                       clock-names = "core", "iface", "phy";
+                       resets = <&gcc PCIE_ACLK_RESET>,
+                                <&gcc PCIE_HCLK_RESET>,
+                                <&gcc PCIE_POR_RESET>,
+                                <&gcc PCIE_PCI_RESET>,
+                                <&gcc PCIE_PHY_RESET>;
+                       reset-names = "axi", "ahb", "por", "pci", "phy";
+                       status = "disabled";
+               };
        };
 };