ARM: dts: STi: STih407: Switch LPC mode from RTC to Clocksource

[deliverable/linux.git] / arch / arm / boot / dts / qcom-apq8064.dtsi

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index ed521e85e208e72bd7e7afd96ac8acb1a5ab77a3..65d0e8d9825947c68b06e53b162d10116df084c0 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -142,62 +142,6 @@
 
                        pinctrl-names = "default";
                        pinctrl-0 = <&ps_hold>;
-
-                       sdc4_gpios: sdc4-gpios {
-                               pios {
-                                       pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
-                                       function = "sdc4";
-                               };
-                       };
-
-                       ps_hold: ps_hold {
-                               mux {
-                                       pins = "gpio78";
-                                       function = "ps_hold";
-                               };
-                       };
-
-                       i2c1_pins: i2c1 {
-                               mux {
-                                       pins = "gpio20", "gpio21";
-                                       function = "gsbi1";
-                               };
-                       };
-
-                       i2c3_pins: i2c3 {
-                               mux {
-                                       pins = "gpio8", "gpio9";
-                                       function = "gsbi3";
-                               };
-                       };
-
-                       gsbi6_uart_2pins: gsbi6_uart_2pins {
-                               mux {
-                                       pins = "gpio14", "gpio15";
-                                       function = "gsbi6";
-                               };
-                       };
-
-                       gsbi6_uart_4pins: gsbi6_uart_4pins {
-                               mux {
-                                       pins = "gpio14", "gpio15", "gpio16", "gpio17";
-                                       function = "gsbi6";
-                               };
-                       };
-
-                       gsbi7_uart_2pins: gsbi7_uart_2pins {
-                               mux {
-                                       pins = "gpio82", "gpio83";
-                                       function = "gsbi7";
-                               };
-                       };
-
-                       gsbi7_uart_4pins: gsbi7_uart_4pins {
-                               mux {
-                                       pins = "gpio82", "gpio83", "gpio84", "gpio85";
-                                       function = "gsbi7";
-                               };
-                       };
                };
 
                sfpb_wrapper_mutex: syscon@1200000 {
@@ -281,10 +225,10 @@
 
                        syscon-tcsr = <&tcsr>;
 
-                       i2c1: i2c@12460000 {
+                       gsbi1_i2c: i2c@12460000 {
                                compatible = "qcom,i2c-qup-v1.1.1";
-                               pinctrl-0 = <&i2c1_pins>;
-                               pinctrl-names = "default";
+                               pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
+                               pinctrl-names = "default", "sleep";
                                reg = <0x12460000 0x1000>;
                                interrupts = <0 194 IRQ_TYPE_NONE>;
                                clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
@@ -292,6 +236,7 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                        };
+
                };
 
                gsbi2: gsbi@12480000 {
@@ -307,9 +252,11 @@
 
                        syscon-tcsr = <&tcsr>;
 
-                       i2c2: i2c@124a0000 {
+                       gsbi2_i2c: i2c@124a0000 {
                                compatible = "qcom,i2c-qup-v1.1.1";
                                reg = <0x124a0000 0x1000>;
+                               pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
+                               pinctrl-names = "default", "sleep";
                                interrupts = <0 196 IRQ_TYPE_NONE>;
                                clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
                                clock-names = "core", "iface";
@@ -328,15 +275,40 @@
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
-                       i2c3: i2c@16280000 {
+                       gsbi3_i2c: i2c@16280000 {
                                compatible = "qcom,i2c-qup-v1.1.1";
-                               pinctrl-0 = <&i2c3_pins>;
-                               pinctrl-names = "default";
+                               pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
+                               pinctrl-names = "default", "sleep";
                                reg = <0x16280000 0x1000>;
                                interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
                                clocks = <&gcc GSBI3_QUP_CLK>,
                                         <&gcc GSBI3_H_CLK>;
                                clock-names = "core", "iface";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
+
+               gsbi4: gsbi@16300000 {
+                       status = "disabled";
+                       compatible = "qcom,gsbi-v1.0.0";
+                       cell-index = <4>;
+                       reg = <0x16300000 0x03>;
+                       clocks = <&gcc GSBI4_H_CLK>;
+                       clock-names = "iface";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       gsbi4_i2c: i2c@16380000 {
+                               compatible = "qcom,i2c-qup-v1.1.1";
+                               pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
+                               pinctrl-names = "default", "sleep";
+                               reg = <0x16380000 0x1000>;
+                               interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
+                               clocks = <&gcc GSBI4_QUP_CLK>,
+                                        <&gcc GSBI4_H_CLK>;
+                               clock-names = "core", "iface";
                        };
                };
 
@@ -360,6 +332,19 @@
                                clock-names = "core", "iface";
                                status = "disabled";
                        };
+
+                       gsbi5_spi: spi@1a280000 {
+                               compatible = "qcom,spi-qup-v1.1.1";
+                               reg = <0x1a280000 0x1000>;
+                               interrupts = <0 155 0>;
+                               pinctrl-0 = <&spi5_default &spi5_sleep>;
+                               pinctrl-names = "default", "sleep";
+                               clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
+                               clock-names = "core", "iface";
+                               status = "disabled";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
                };
 
                gsbi6: gsbi@16500000 {
@@ -382,6 +367,17 @@
                                clock-names = "core", "iface";
                                status = "disabled";
                        };
+
+                       gsbi6_i2c: i2c@16580000 {
+                               compatible = "qcom,i2c-qup-v1.1.1";
+                               pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
+                               pinctrl-names = "default", "sleep";
+                               reg = <0x16580000 0x1000>;
+                               interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
+                               clocks = <&gcc GSBI6_QUP_CLK>,
+                                        <&gcc GSBI6_H_CLK>;
+                               clock-names = "core", "iface";
+                       };
                };
 
                gsbi7: gsbi@16600000 {
@@ -521,6 +517,11 @@
                                          <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
                        interrupt-names = "ack", "err", "wakeup";
 
+                       rpmcc: clock-controller {
+                               compatible      = "qcom,rpmcc-apq8064", "qcom,rpmcc";
+                               #clock-cells = <1>;
+                       };
+
                        regulators {
                                compatible = "qcom,rpm-pm8921-regulators";
 
@@ -721,7 +722,7 @@
                };
 
                amba {
-                       compatible = "arm,amba-bus";
+                       compatible = "simple-bus";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
@@ -823,3 +824,4 @@
                };
        };
 };
+#include "qcom-apq8064-pins.dtsi"