ARM: shmobile: r8a7791: Add JPU device node.

[deliverable/linux.git] / arch / arm / boot / dts / r8a7791.dtsi

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index dc1cd3f16606071294f31c54bc0b4ef8ec14fe75..1cb6c2d079331d4ff2b5c5aaa73aa83fa431bb74 100644 (file)
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -70,7 +70,7 @@
        };
 
        gic: interrupt-controller@f1001000 {
-               compatible = "arm,cortex-a15-gic";
+               compatible = "arm,gic-400";
                #interrupt-cells = <3>;
                #address-cells = <0>;
                interrupt-controller;
@@ -898,6 +898,13 @@
                status = "disabled";
        };
 
+       jpu: jpeg-codec@fe980000 {
+               compatible = "renesas,jpu-r8a7791";
+               reg = <0 0xfe980000 0 0x10300>;
+               interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp1_clks R8A7791_CLK_JPU>;
+       };
+
        clocks {
                #address-cells = <2>;
                #size-cells = <2>;
@@ -1311,6 +1318,7 @@
                                <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
                                <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
                                <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
+                               <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
                                <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>;
 
                        #clock-cells = <1>;
@@ -1320,6 +1328,7 @@
                                R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
                                R8A7791_CLK_SCU_ALL
                                R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0
+                               R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0
                                R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5
                                R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0
                        >;
@@ -1329,6 +1338,7 @@
                                "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
                                "scu-all",
                                "scu-dvc1", "scu-dvc0",
+                               "scu-ctu1-mix1", "scu-ctu0-mix0",
                                "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
                                "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
                };
@@ -1582,6 +1592,8 @@
                        <&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>,
                        <&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>,
                        <&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>,
+                       <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
+                       <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
                        <&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>,
                        <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
                clock-names = "ssi-all",
@@ -1589,6 +1601,8 @@
                                "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
                                "src.9", "src.8", "src.7", "src.6", "src.5",
                                "src.4", "src.3", "src.2", "src.1", "src.0",
+                               "ctu.0", "ctu.1",
+                               "mix.0", "mix.1",
                                "dvc.0", "dvc.1",
                                "clk_a", "clk_b", "clk_c", "clk_i";
 
@@ -1605,6 +1619,22 @@
                        };
                };
 
+               rcar_sound,mix {
+                       mix0: mix@0 { };
+                       mix1: mix@1 { };
+               };
+
+               rcar_sound,ctu {
+                       ctu00: ctu@0 { };
+                       ctu01: ctu@1 { };
+                       ctu02: ctu@2 { };
+                       ctu03: ctu@3 { };
+                       ctu10: ctu@4 { };
+                       ctu11: ctu@5 { };
+                       ctu12: ctu@6 { };
+                       ctu13: ctu@7 { };
+               };
+
                rcar_sound,src {
                        src0: src@0 {
                                interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;