ARM: dts: STi: stih407-family: Add nodes for Mailbox

[deliverable/linux.git] / arch / arm / boot / dts / stih407-family.dtsi

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 81f81214cdf9580a0cb19ce01d8bfc5e01417252..680b7c10618ec128be138d1e47ed54020d4075ad 100644 (file)
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -22,15 +22,35 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0>;
+
                        /* u-boot puts hpen in SBC dmem at 0xa4 offset */
                        cpu-release-addr = <0x94100A4>;
+
+                                        /* kHz     uV   */
+                       operating-points = <1500000 0
+                                           1200000 0
+                                           800000  0
+                                           500000  0>;
+
+                       clocks = <&clk_m_a9>;
+                       clock-names = "cpu";
+                       clock-latency = <100000>;
+                       cpu0-supply = <&pwm_regulator>;
+                       st,syscfg = <&syscfg_core 0x8e0>;
                };
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <1>;
+
                        /* u-boot puts hpen in SBC dmem at 0xa4 offset */
                        cpu-release-addr = <0x94100A4>;
+
+                                        /* kHz     uV   */
+                       operating-points = <1500000 0
+                                           1200000 0
+                                           800000  0
+                                           500000  0>;
                };
        };
 
@@ -694,5 +714,38 @@
                        clocks          = <&clk_sysin>;
                        status          = "okay";
                };
+
+               mailbox0: mailbox@8f00000  {
+                       compatible      = "st,stih407-mailbox";
+                       reg             = <0x8f00000 0x1000>;
+                       interrupts      = <GIC_SPI 1 IRQ_TYPE_NONE>;
+                       #mbox-cells     = <2>;
+                       mbox-name       = "a9";
+                       status          = "okay";
+               };
+
+               mailbox1: mailbox@8f01000 {
+                       compatible      = "st,stih407-mailbox";
+                       reg             = <0x8f01000 0x1000>;
+                       #mbox-cells     = <2>;
+                       mbox-name       = "st231_gp_1";
+                       status          = "okay";
+               };
+
+               mailbox2: mailbox@8f02000 {
+                       compatible      = "st,stih407-mailbox";
+                       reg             = <0x8f02000 0x1000>;
+                       #mbox-cells     = <2>;
+                       mbox-name       = "st231_gp_0";
+                       status          = "okay";
+               };
+
+               mailbox3: mailbox@8f03000 {
+                       compatible      = "st,stih407-mailbox";
+                       reg             = <0x8f03000 0x1000>;
+                       #mbox-cells     = <2>;
+                       mbox-name       = "st231_audio_video";
+                       status          = "okay";
+               };
        };
 };