Merge tag 'zynq-cleanup-for-3.16' of git://git.xilinx.com/linux-xlnx into next/soc

[deliverable/linux.git] / arch / arm / boot / dts / zynq-7000.dtsi

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 511180769af5c0fb31acd6beb58cb1031a417a1d..80d8e4f3f62681db052cd949e5e8044c09804e89 100644 (file)
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -24,6 +24,7 @@
                        device_type = "cpu";
                        reg = <0>;
                        clocks = <&clkc 3>;
+                       clock-latency = <1000>;
                        operating-points = <
                                /* kHz    uV */
                                666667  1000000
@@ -54,6 +55,28 @@
                interrupt-parent = <&intc>;
                ranges;
 
+               i2c0: zynq-i2c@e0004000 {
+                       compatible = "cdns,i2c-r1p10";
+                       status = "disabled";
+                       clocks = <&clkc 38>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 25 4>;
+                       reg = <0xe0004000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               i2c1: zynq-i2c@e0005000 {
+                       compatible = "cdns,i2c-r1p10";
+                       status = "disabled";
+                       clocks = <&clkc 39>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <0 48 4>;
+                       reg = <0xe0005000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                intc: interrupt-controller@f8f01000 {
                        compatible = "arm,cortex-a9-gic";
                        #interrupt-cells = <3>;
@@ -154,6 +177,11 @@
                        };
                };
 
+               devcfg: devcfg@f8007000 {
+                       compatible = "xlnx,zynq-devcfg-1.0";
+                       reg = <0xf8007000 0x100>;
+               } ;
+
                global_timer: timer@f8f00200 {
                        compatible = "arm,cortex-a9-global-timer";
                        reg = <0xf8f00200 0x20>;