ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+

[deliverable/linux.git] / arch / arm / kernel / iwmmxt.S

diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index a5599cfc43cbb17280e26bc942c30853ab954c7f..0960be7953f049ab06360b7f8e719cebe5cc0eda 100644 (file)
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -179,7 +179,7 @@ concan_load:
        get_thread_info r10
 #endif
 4:     dec_preempt_count r10, r3
-       mov     pc, lr
+       ret     lr
 
 /*
  * Back up Concan regs to save area and disable access to them
@@ -265,7 +265,7 @@ ENTRY(iwmmxt_task_copy)
        mov     r3, lr                          @ preserve return address
        bl      concan_dump
        msr     cpsr_c, ip                      @ restore interrupt mode
-       mov     pc, r3
+       ret     r3
 
 /*
  * Restore Concan state from given memory address
@@ -301,7 +301,7 @@ ENTRY(iwmmxt_task_restore)
        mov     r3, lr                          @ preserve return address
        bl      concan_load
        msr     cpsr_c, ip                      @ restore interrupt mode
-       mov     pc, r3
+       ret     r3
 
 /*
  * Concan handling on task switch
@@ -323,7 +323,7 @@ ENTRY(iwmmxt_task_switch)
        add     r3, r0, #TI_IWMMXT_STATE        @ get next task Concan save area
        ldr     r2, [r2]                        @ get current Concan owner
        teq     r2, r3                          @ next task owns it?
-       movne   pc, lr                          @ no: leave Concan disabled
+       retne   lr                              @ no: leave Concan disabled
 
 1:     @ flip Concan access
        XSC(eor r1, r1, #0x3)
@@ -350,7 +350,7 @@ ENTRY(iwmmxt_task_release)
        eors    r0, r0, r1                      @ if equal...
        streq   r0, [r3]                        @ then clear ownership
        msr     cpsr_c, r2                      @ restore interrupts
-       mov     pc, lr
+       ret     lr
 
        .data
 concan_owner: