ARM: 5580/2: ARM TCM (Tightly-Coupled Memory) support v3

[deliverable/linux.git] / arch / arm / kernel / setup.c

diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index bc5e4128f9f318a50bd4abc2e2b426c8db11eecb..c6c57b640b6bfe5c1129251d0f0e6a497ebc1700 100644 (file)
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -25,6 +25,7 @@
 #include <linux/smp.h>
 #include <linux/fs.h>
 
+#include <asm/unified.h>
 #include <asm/cpu.h>
 #include <asm/cputype.h>
 #include <asm/elf.h>
@@ -44,6 +45,7 @@
 
 #include "compat.h"
 #include "atags.h"
+#include "tcm.h"
 
 #ifndef MEM_SIZE
 #define MEM_SIZE       (16*1024*1024)
@@ -326,26 +328,39 @@ void cpu_init(void)
                BUG();
        }
 
+       /*
+        * Define the placement constraint for the inline asm directive below.
+        * In Thumb-2, msr with an immediate value is not allowed.
+        */
+#ifdef CONFIG_THUMB2_KERNEL
+#define PLC    "r"
+#else
+#define PLC    "I"
+#endif
+
        /*
         * setup stacks for re-entrant exception handlers
         */
        __asm__ (
        "msr    cpsr_c, %1\n\t"
-       "add    sp, %0, %2\n\t"
+       "add    r14, %0, %2\n\t"
+       "mov    sp, r14\n\t"
        "msr    cpsr_c, %3\n\t"
-       "add    sp, %0, %4\n\t"
+       "add    r14, %0, %4\n\t"
+       "mov    sp, r14\n\t"
        "msr    cpsr_c, %5\n\t"
-       "add    sp, %0, %6\n\t"
+       "add    r14, %0, %6\n\t"
+       "mov    sp, r14\n\t"
        "msr    cpsr_c, %7"
            :
            : "r" (stk),
-             "I" (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
+             PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
              "I" (offsetof(struct stack, irq[0])),
-             "I" (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
+             PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
              "I" (offsetof(struct stack, abt[0])),
-             "I" (PSR_F_BIT | PSR_I_BIT | UND_MODE),
+             PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
              "I" (offsetof(struct stack, und[0])),
-             "I" (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
+             PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
            : "r14");
 }
 
@@ -735,6 +750,7 @@ void __init setup_arch(char **cmdline_p)
 #endif
 
        cpu_init();
+       tcm_init();
 
        /*
         * Set up various architecture-specific pointers