tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
__raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
+ if (soc_is_exynos4212()) {
+ tmp = __raw_readl(S5P_CENTRAL_SEQ_OPTION);
+ tmp &= ~(S5P_USE_STANDBYWFI_ISP_ARM |
+ S5P_USE_STANDBYWFE_ISP_ARM);
+ __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
+ }
+
/* Save Power control register */
asm ("mrc p15, 0, %0, c15, c0, 0"
: "=r" (tmp) : : "cc");