ARM: imx6: report soc info via soc device

[deliverable/linux.git] / arch / arm / mach-imx / cpu.c

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index e70e3acbf9bd04516257010c86958e99da766e04..fae2c9a787441540ad586f438024f44dd8c74c9a 100644 (file)
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -1,6 +1,9 @@
 
 #include <linux/module.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
 
 #include "hardware.h"
 #include "common.h"
@@ -8,11 +11,23 @@
 unsigned int __mxc_cpu_type;
 EXPORT_SYMBOL(__mxc_cpu_type);
 
+static unsigned int imx_soc_revision;
+
 void mxc_set_cpu_type(unsigned int type)
 {
        __mxc_cpu_type = type;
 }
 
+void imx_set_soc_revision(unsigned int rev)
+{
+       imx_soc_revision = rev;
+}
+
+unsigned int imx_get_soc_revision(void)
+{
+       return imx_soc_revision;
+}
+
 void imx_print_silicon_rev(const char *cpu, int srev)
 {
        if (srev == IMX_CHIP_REVISION_UNKNOWN)
@@ -44,3 +59,81 @@ void __init imx_set_aips(void __iomem *base)
        reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
        __raw_writel(reg, base + 0x50);
 }
+
+struct device * __init imx_soc_device_init(void)
+{
+       struct soc_device_attribute *soc_dev_attr;
+       struct soc_device *soc_dev;
+       struct device_node *root;
+       const char *soc_id;
+       int ret;
+
+       soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+       if (!soc_dev_attr)
+               return NULL;
+
+       soc_dev_attr->family = "Freescale i.MX";
+
+       root = of_find_node_by_path("/");
+       ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
+       of_node_put(root);
+       if (ret)
+               goto free_soc;
+
+       switch (__mxc_cpu_type) {
+       case MXC_CPU_MX1:
+               soc_id = "i.MX1";
+               break;
+       case MXC_CPU_MX21:
+               soc_id = "i.MX21";
+               break;
+       case MXC_CPU_MX25:
+               soc_id = "i.MX25";
+               break;
+       case MXC_CPU_MX27:
+               soc_id = "i.MX27";
+               break;
+       case MXC_CPU_MX31:
+               soc_id = "i.MX31";
+               break;
+       case MXC_CPU_MX35:
+               soc_id = "i.MX35";
+               break;
+       case MXC_CPU_MX51:
+               soc_id = "i.MX51";
+               break;
+       case MXC_CPU_MX53:
+               soc_id = "i.MX53";
+               break;
+       case MXC_CPU_IMX6SL:
+               soc_id = "i.MX6SL";
+               break;
+       case MXC_CPU_IMX6DL:
+               soc_id = "i.MX6DL";
+               break;
+       case MXC_CPU_IMX6Q:
+               soc_id = "i.MX6Q";
+               break;
+       default:
+               soc_id = "Unknown";
+       }
+       soc_dev_attr->soc_id = soc_id;
+
+       soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
+                                          (imx_soc_revision >> 4) & 0xf,
+                                          imx_soc_revision & 0xf);
+       if (!soc_dev_attr->revision)
+               goto free_soc;
+
+       soc_dev = soc_device_register(soc_dev_attr);
+       if (IS_ERR(soc_dev))
+               goto free_rev;
+
+       return soc_device_to_device(soc_dev);
+
+free_rev:
+       kfree(soc_dev_attr->revision);
+free_soc:
+       kfree(soc_dev_attr);
+       return NULL;
+}