ARM: msm: convert SMP platforms to CONFIG_MULTI_IRQ_HANDLER

[deliverable/linux.git] / arch / arm / mach-msm / include / mach / entry-macro.S

diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index b16f082eeb6f7c092f8a041f3ba302fae5fcf163..41f7003ef34f7596f1a517415b20fcfed7d9b3b0 100644 (file)
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,8 +16,27 @@
  *
  */
 
-#if defined(CONFIG_ARM_GIC)
-#include <mach/entry-macro-qgic.S>
-#else
-#include <mach/entry-macro-vic.S>
+       .macro  disable_fiq
+       .endm
+
+       .macro  arch_ret_to_user, tmp1, tmp2
+       .endm
+
+#if !defined(CONFIG_ARM_GIC)
+#include <mach/msm_iomap.h>
+
+       .macro  get_irqnr_preamble, base, tmp
+       @ enable imprecise aborts
+       cpsie   a
+       mov     \base, #MSM_VIC_BASE
+       .endm
+
+       .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+       @ 0xD0 has irq# or old irq# if the irq has been handled
+       @ 0xD4 has irq# or -1 if none pending *but* if you just
+       @ read 0xD4 you never get the first irq for some reason
+       ldr     \irqnr, [\base, #0xD0]
+       ldr     \irqnr, [\base, #0xD4]
+       cmp     \irqnr, #0xffffffff
+       .endm
 #endif