Merge branch 'next/drivers' into HEAD

[deliverable/linux.git] / arch / arm / mach-msm / timer.c

diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index ddb87011765922501b57278566bdfb3e6220a652..476549a8a709c65a6ed6378b7997ad6955efec7a 100644 (file)
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -20,6 +20,9 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
 #include <asm/hardware/gic.h>
@@ -34,7 +37,6 @@
 #define TIMER_ENABLE_CLR_ON_MATCH_EN    BIT(1)
 #define TIMER_ENABLE_EN                 BIT(0)
 #define TIMER_CLEAR             0x000C
-#define DGT_CLK_CTL             0x0030
 #define DGT_CLK_CTL_DIV_4      0x3
 
 #define GPT_HZ 32768
@@ -99,7 +101,7 @@ static struct clock_event_device msm_clockevent = {
 
 static union {
        struct clock_event_device *evt;
-       struct clock_event_device __percpu **percpu_evt;
+       struct clock_event_device * __percpu *percpu_evt;
 } msm_evt;
 
 static void __iomem *source_base;
@@ -216,6 +218,90 @@ err:
        setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz);
 }
 
+#ifdef CONFIG_OF
+static const struct of_device_id msm_dgt_match[] __initconst = {
+       { .compatible = "qcom,msm-dgt" },
+       { },
+};
+
+static const struct of_device_id msm_gpt_match[] __initconst = {
+       { .compatible = "qcom,msm-gpt" },
+       { },
+};
+
+static void __init msm_dt_timer_init(void)
+{
+       struct device_node *np;
+       u32 freq;
+       int irq;
+       struct resource res;
+       u32 percpu_offset;
+       void __iomem *dgt_clk_ctl;
+
+       np = of_find_matching_node(NULL, msm_gpt_match);
+       if (!np) {
+               pr_err("Can't find GPT DT node\n");
+               return;
+       }
+
+       event_base = of_iomap(np, 0);
+       if (!event_base) {
+               pr_err("Failed to map event base\n");
+               return;
+       }
+
+       irq = irq_of_parse_and_map(np, 0);
+       if (irq <= 0) {
+               pr_err("Can't get irq\n");
+               return;
+       }
+       of_node_put(np);
+
+       np = of_find_matching_node(NULL, msm_dgt_match);
+       if (!np) {
+               pr_err("Can't find DGT DT node\n");
+               return;
+       }
+
+       if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
+               percpu_offset = 0;
+
+       if (of_address_to_resource(np, 0, &res)) {
+               pr_err("Failed to parse DGT resource\n");
+               return;
+       }
+
+       source_base = ioremap(res.start + percpu_offset, resource_size(&res));
+       if (!source_base) {
+               pr_err("Failed to map source base\n");
+               return;
+       }
+
+       if (!of_address_to_resource(np, 1, &res)) {
+               dgt_clk_ctl = ioremap(res.start + percpu_offset,
+                                     resource_size(&res));
+               if (!dgt_clk_ctl) {
+                       pr_err("Failed to map DGT control base\n");
+                       return;
+               }
+               writel_relaxed(DGT_CLK_CTL_DIV_4, dgt_clk_ctl);
+               iounmap(dgt_clk_ctl);
+       }
+
+       if (of_property_read_u32(np, "clock-frequency", &freq)) {
+               pr_err("Unknown frequency\n");
+               return;
+       }
+       of_node_put(np);
+
+       msm_timer_init(freq, 32, irq, !!percpu_offset);
+}
+
+struct sys_timer msm_dt_timer = {
+       .init = msm_dt_timer_init
+};
+#endif
+
 static int __init msm_timer_map(phys_addr_t event, phys_addr_t source)
 {
        event_base = ioremap(event, SZ_64);
@@ -259,30 +345,6 @@ struct sys_timer msm7x30_timer = {
        .init = msm7x30_timer_init
 };
 
-static void __init msm8x60_timer_init(void)
-{
-       if (msm_timer_map(0x02000004, 0x02040024))
-               return;
-       writel_relaxed(DGT_CLK_CTL_DIV_4, event_base + DGT_CLK_CTL);
-       msm_timer_init(27000000 / 4, 32, 17, true);
-}
-
-struct sys_timer msm8x60_timer = {
-       .init = msm8x60_timer_init
-};
-
-static void __init msm8960_timer_init(void)
-{
-       if (msm_timer_map(0x0200A004, 0x0208A024))
-               return;
-       writel_relaxed(DGT_CLK_CTL_DIV_4, event_base + DGT_CLK_CTL);
-       msm_timer_init(27000000 / 4, 32, 17, true);
-}
-
-struct sys_timer msm8960_timer = {
-       .init = msm8960_timer_init
-};
-
 static void __init qsd8x50_timer_init(void)
 {
        if (msm_timer_map(0xAC100000, 0xAC100010))