Merge tag 'for-linus-docs-2012-05-02' of git://git.kernel.org/pub/scm/linux/kernel...

[deliverable/linux.git] / arch / arm / mach-omap2 / cclock33xx_data.c

diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c
index dcc5bf57a263c1279c6bd0f4c2c463fde895fcd3..6ebc7803bc3e37b48ff9c1b394a39e2a3dff9a28 100644 (file)
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -413,6 +413,14 @@ static struct clk smartreflex1_fck;
 DEFINE_STRUCT_CLK_HW_OMAP(smartreflex1_fck, NULL);
 DEFINE_STRUCT_CLK(smartreflex1_fck, dpll_core_ck_parents, clk_ops_null);
 
+static struct clk sha0_fck;
+DEFINE_STRUCT_CLK_HW_OMAP(sha0_fck, NULL);
+DEFINE_STRUCT_CLK(sha0_fck, dpll_core_ck_parents, clk_ops_null);
+
+static struct clk aes0_fck;
+DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL);
+DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null);
+
 /*
  * Modules clock nodes
  *
@@ -878,6 +886,8 @@ static struct omap_clk am33xx_clks[] = {
        CLK(NULL,       "mmu_fck",              &mmu_fck),
        CLK(NULL,       "smartreflex0_fck",     &smartreflex0_fck),
        CLK(NULL,       "smartreflex1_fck",     &smartreflex1_fck),
+       CLK(NULL,       "sha0_fck",             &sha0_fck),
+       CLK(NULL,       "aes0_fck",             &aes0_fck),
        CLK(NULL,       "timer1_fck",           &timer1_fck),
        CLK(NULL,       "timer2_fck",           &timer2_fck),
        CLK(NULL,       "timer3_fck",           &timer3_fck),
@@ -947,6 +957,14 @@ int __init am33xx_clk_init(void)
 
        clk_set_parent(&timer3_fck, &sys_clkin_ck);
        clk_set_parent(&timer6_fck, &sys_clkin_ck);
+       /*
+        * The On-Chip 32K RC Osc clock is not an accurate clock-source as per
+        * the design/spec, so as a result, for example, timer which supposed
+        * to get expired @60Sec, but will expire somewhere ~@40Sec, which is
+        * not expected by any use-case, so change WDT1 clock source to PRCM
+        * 32KHz clock.
+        */
+       clk_set_parent(&wdt1_fck, &clkdiv32k_ick);
 
        return 0;
 }