Merge branch 'next/drivers' into HEAD

[deliverable/linux.git] / arch / arm / mach-omap2 / clkt34xx_dpll3m2.c

diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index d6e34dd9e7e75c6dde4de60a004e319dd7f02547..298887b5bf66c5168a248372b26d5410658f1ae4 100644 (file)
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -92,15 +92,13 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
 
        pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate,
                 validrate);
-       pr_debug("clock: SDRC CS0 timing params used:"
-                " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n",
+       pr_debug("clock: SDRC CS0 timing params used: RFR %08x CTRLA %08x CTRLB %08x MR %08x\n",
                 sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla,
                 sdrc_cs0->actim_ctrlb, sdrc_cs0->mr);
        if (sdrc_cs1)
-               pr_debug("clock: SDRC CS1 timing params used: "
-                " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n",
-                sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla,
-                sdrc_cs1->actim_ctrlb, sdrc_cs1->mr);
+               pr_debug("clock: SDRC CS1 timing params used: RFR %08x CTRLA %08x CTRLB %08x MR %08x\n",
+                        sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla,
+                        sdrc_cs1->actim_ctrlb, sdrc_cs1->mr);
 
        if (sdrc_cs1)
                omap3_configure_core_dpll(