ARM: OMAP2+: raw read and write endian fix

[deliverable/linux.git] / arch / arm / mach-omap2 / sr_device.c

diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index d7bc33f153440c8fe4ee313aeff889d67002ad7b..1b91ef0c182a0a0bd53a59501b6cb7e6bbc3aa7c 100644 (file)
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -57,7 +57,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
 
                /*
                 * In OMAP4 the efuse registers are 24 bit aligned.
-                * A __raw_readl will fail for non-32 bit aligned address
+                * A readl_relaxed will fail for non-32 bit aligned address
                 * and hence the 8-bit read and shift.
                 */
                if (cpu_is_omap44xx()) {