Merge tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland...
[deliverable/linux.git] / arch / arm / mach-tegra / sleep-tegra30.S
index 63fa91b5fafb9ad1293ca2d18798324d6fa886db..b16d4a57fa59dd529e2ae97bd8890521bf543fe6 100644 (file)
@@ -20,6 +20,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/cache.h>
 
+#include "irammap.h"
 #include "fuse.h"
 #include "sleep.h"
 #include "flowctrl.h"
@@ -262,7 +263,7 @@ ENTRY(tegra30_sleep_core_finish)
        mov32   r0, tegra30_tear_down_core
        mov32   r1, tegra30_iram_start
        sub     r0, r0, r1
-       mov32   r1, TEGRA_IRAM_CODE_AREA
+       mov32   r1, TEGRA_IRAM_LPx_RESUME_AREA
        add     r0, r0, r1
 
        mov     pc, r3
@@ -314,7 +315,7 @@ tegra30_iram_start:
  * The physical address of tegra_resume expected to be stored in
  * PMC_SCRATCH41.
  *
- * NOTE: THIS *MUST* BE RELOCATED TO TEGRA_IRAM_CODE_AREA.
+ * NOTE: THIS *MUST* BE RELOCATED TO TEGRA_IRAM_LPx_RESUME_AREA.
  */
 ENTRY(tegra30_lp1_reset)
        /*
@@ -382,7 +383,7 @@ _pll_m_c_x_done:
        add     r1, r1, #LOCK_DELAY
        wait_until r1, r7, r3
 
-       adr     r5, tegra30_sdram_pad_save
+       adr     r5, tegra_sdram_pad_save
 
        ldr     r4, [r5, #0x18]         @ restore CLK_SOURCE_MSELECT
        str     r4, [r0, #CLK_RESET_CLK_SOURCE_MSELECT]
@@ -407,8 +408,12 @@ _pll_m_c_x_done:
        cmp     r10, #TEGRA30
        movweq  r0, #:lower16:TEGRA_EMC_BASE    @ r0 reserved for emc base
        movteq  r0, #:upper16:TEGRA_EMC_BASE
-       movwne  r0, #:lower16:TEGRA_EMC0_BASE
-       movtne  r0, #:upper16:TEGRA_EMC0_BASE
+       cmp     r10, #TEGRA114
+       movweq  r0, #:lower16:TEGRA_EMC0_BASE
+       movteq  r0, #:upper16:TEGRA_EMC0_BASE
+       cmp     r10, #TEGRA124
+       movweq  r0, #:lower16:TEGRA124_EMC_BASE
+       movteq  r0, #:upper16:TEGRA124_EMC_BASE
 
 exit_self_refresh:
        ldr     r1, [r5, #0xC]          @ restore EMC_XM2VTTGENPADCTRL
@@ -537,6 +542,7 @@ tegra30_sdram_pad_address:
        .word   TEGRA_PMC_BASE + PMC_IO_DPD_STATUS                      @0x14
        .word   TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT     @0x18
        .word   TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST             @0x1c
+tegra30_sdram_pad_address_end:
 
 tegra114_sdram_pad_address:
        .word   TEGRA_EMC0_BASE + EMC_CFG                               @0x0
@@ -552,16 +558,28 @@ tegra114_sdram_pad_address:
        .word   TEGRA_EMC1_BASE + EMC_AUTO_CAL_INTERVAL                 @0x28
        .word   TEGRA_EMC1_BASE + EMC_XM2VTTGENPADCTRL                  @0x2c
        .word   TEGRA_EMC1_BASE + EMC_XM2VTTGENPADCTRL2                 @0x30
+tegra114_sdram_pad_adress_end:
+
+tegra124_sdram_pad_address:
+       .word   TEGRA124_EMC_BASE + EMC_CFG                             @0x0
+       .word   TEGRA124_EMC_BASE + EMC_ZCAL_INTERVAL                   @0x4
+       .word   TEGRA124_EMC_BASE + EMC_AUTO_CAL_INTERVAL               @0x8
+       .word   TEGRA124_EMC_BASE + EMC_XM2VTTGENPADCTRL                @0xc
+       .word   TEGRA124_EMC_BASE + EMC_XM2VTTGENPADCTRL2               @0x10
+       .word   TEGRA_PMC_BASE + PMC_IO_DPD_STATUS                      @0x14
+       .word   TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT     @0x18
+       .word   TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST             @0x1c
+tegra124_sdram_pad_address_end:
 
 tegra30_sdram_pad_size:
-       .word   tegra114_sdram_pad_address - tegra30_sdram_pad_address
+       .word   tegra30_sdram_pad_address_end - tegra30_sdram_pad_address
 
 tegra114_sdram_pad_size:
-       .word   tegra30_sdram_pad_size - tegra114_sdram_pad_address
+       .word   tegra114_sdram_pad_adress_end - tegra114_sdram_pad_address
 
-       .type   tegra30_sdram_pad_save, %object
-tegra30_sdram_pad_save:
-       .rept (tegra30_sdram_pad_size - tegra114_sdram_pad_address) / 4
+       .type   tegra_sdram_pad_save, %object
+tegra_sdram_pad_save:
+       .rept (tegra114_sdram_pad_adress_end - tegra114_sdram_pad_address) / 4
        .long   0
        .endr
 
@@ -692,13 +710,18 @@ halted:
  */
 tegra30_sdram_self_refresh:
 
-       adr     r8, tegra30_sdram_pad_save
+       adr     r8, tegra_sdram_pad_save
        tegra_get_soc_id TEGRA_APB_MISC_BASE, r10
        cmp     r10, #TEGRA30
        adreq   r2, tegra30_sdram_pad_address
        ldreq   r3, tegra30_sdram_pad_size
-       adrne   r2, tegra114_sdram_pad_address
-       ldrne   r3, tegra114_sdram_pad_size
+       cmp     r10, #TEGRA114
+       adreq   r2, tegra114_sdram_pad_address
+       ldreq   r3, tegra114_sdram_pad_size
+       cmp     r10, #TEGRA124
+       adreq   r2, tegra124_sdram_pad_address
+       ldreq   r3, tegra30_sdram_pad_size
+
        mov     r9, #0
 
 padsave:
@@ -716,7 +739,10 @@ padsave_done:
 
        cmp     r10, #TEGRA30
        ldreq   r0, =TEGRA_EMC_BASE     @ r0 reserved for emc base addr
-       ldrne   r0, =TEGRA_EMC0_BASE
+       cmp     r10, #TEGRA114
+       ldreq   r0, =TEGRA_EMC0_BASE
+       cmp     r10, #TEGRA124
+       ldreq   r0, =TEGRA124_EMC_BASE
 
 enter_self_refresh:
        cmp     r10, #TEGRA30
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