arm64: dts: qcom: Add 8x16 Serial UART1 node

[deliverable/linux.git] / arch / arm64 / boot / dts / qcom / msm8916.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 5911de008dd5010da246c809c0252babcd606ab3..85f7bee33c184f22d6e1e4d20f96b8c53d26dffd 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -102,6 +102,15 @@
                        reg = <0x1800000 0x80000>;
                };
 
+               blsp1_uart1: serial@78af000 {
+                       compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+                       reg = <0x78af000 0x200>;
+                       interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       status = "disabled";
+               };
+
                blsp1_uart2: serial@78b0000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0x78b0000 0x200>;
@@ -390,6 +399,13 @@
                        interrupt-controller;
                        #interrupt-cells = <4>;
                };
+
+               rng@22000 {
+                       compatible = "qcom,prng";
+                       reg = <0x00022000 0x200>;
+                       clocks = <&gcc GCC_PRNG_AHB_CLK>;
+                       clock-names = "core";
+               };
        };
 };