Use an irq_enable_hazard hazard barrier in unmask_mips_irq. This
[deliverable/linux.git] / arch / mips / kernel / irq_cpu.c
index 905ff843a68fb6d86c6a797f2df67d87fbb356db..060722e42c53f9e8aac2f268dea306e4219a0465 100644 (file)
@@ -40,11 +40,13 @@ static int mips_cpu_irq_base;
 static inline void unmask_mips_irq(unsigned int irq)
 {
        set_c0_status(0x100 << (irq - mips_cpu_irq_base));
+       irq_enable_hazard();
 }
 
 static inline void mask_mips_irq(unsigned int irq)
 {
        clear_c0_status(0x100 << (irq - mips_cpu_irq_base));
+       irq_disable_hazard();
 }
 
 static inline void mips_cpu_irq_enable(unsigned int irq)
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