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[MIPS] Fix loads of section missmatches
[deliverable/linux.git]
/
arch
/
mips
/
mm
/
sc-r5k.c
diff --git
a/arch/mips/mm/sc-r5k.c
b/arch/mips/mm/sc-r5k.c
index d35b6c1103a393d8f52994ec66ee59859c59e90a..f330d38e55753b057c9647c031215c8fb2feb7d0 100644
(file)
--- a/
arch/mips/mm/sc-r5k.c
+++ b/
arch/mips/mm/sc-r5k.c
@@
-99,7
+99,7
@@
static struct bcache_ops r5k_sc_ops = {
.bc_inv = r5k_dma_cache_inv_sc
};
-void __init r5k_sc_init(void)
+void __
cpu
init r5k_sc_init(void)
{
if (r5k_sc_probe()) {
r5k_sc_enable();
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