[MIPS] Fix loads of section missmatches

[deliverable/linux.git] / arch / mips / mm / tlb-r3k.c

diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c
index 7948e9a5e37212bccc6da9bce7d4829429169dc9..a782549ac80eaa02069e40a18f6e0d98527be9b2 100644 (file)
--- a/arch/mips/mm/tlb-r3k.c
+++ b/arch/mips/mm/tlb-r3k.c
@@ -281,7 +281,7 @@ void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
        }
 }
 
-void __init tlb_init(void)
+void __cpuinit tlb_init(void)
 {
        local_flush_tlb_all();