powerpc: Convert to new irq_* function names

[deliverable/linux.git] / arch / powerpc / platforms / 52xx / mpc52xx_gpt.c

diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index 859abf1c6d4bf8b32b90da11021075798ce2fc88..6c39b9cc2fa3fe0b367d92e086a7f9b046f93700 100644 (file)
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -135,9 +135,9 @@ DEFINE_MUTEX(mpc52xx_gpt_list_mutex);
  * Cascaded interrupt controller hooks
  */
 
-static void mpc52xx_gpt_irq_unmask(unsigned int virq)
+static void mpc52xx_gpt_irq_unmask(struct irq_data *d)
 {
-       struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+       struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);
        unsigned long flags;
 
        spin_lock_irqsave(&gpt->lock, flags);
@@ -145,9 +145,9 @@ static void mpc52xx_gpt_irq_unmask(unsigned int virq)
        spin_unlock_irqrestore(&gpt->lock, flags);
 }
 
-static void mpc52xx_gpt_irq_mask(unsigned int virq)
+static void mpc52xx_gpt_irq_mask(struct irq_data *d)
 {
-       struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+       struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);
        unsigned long flags;
 
        spin_lock_irqsave(&gpt->lock, flags);
@@ -155,20 +155,20 @@ static void mpc52xx_gpt_irq_mask(unsigned int virq)
        spin_unlock_irqrestore(&gpt->lock, flags);
 }
 
-static void mpc52xx_gpt_irq_ack(unsigned int virq)
+static void mpc52xx_gpt_irq_ack(struct irq_data *d)
 {
-       struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+       struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);
 
        out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);
 }
 
-static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc52xx_gpt_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-       struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+       struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);
        unsigned long flags;
        u32 reg;
 
-       dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, virq, flow_type);
+       dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, d->irq, flow_type);
 
        spin_lock_irqsave(&gpt->lock, flags);
        reg = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_MODE_ICT_MASK;
@@ -184,15 +184,15 @@ static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
 
 static struct irq_chip mpc52xx_gpt_irq_chip = {
        .name = "MPC52xx GPT",
-       .unmask = mpc52xx_gpt_irq_unmask,
-       .mask = mpc52xx_gpt_irq_mask,
-       .ack = mpc52xx_gpt_irq_ack,
-       .set_type = mpc52xx_gpt_irq_set_type,
+       .irq_unmask = mpc52xx_gpt_irq_unmask,
+       .irq_mask = mpc52xx_gpt_irq_mask,
+       .irq_ack = mpc52xx_gpt_irq_ack,
+       .irq_set_type = mpc52xx_gpt_irq_set_type,
 };
 
 void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
 {
-       struct mpc52xx_gpt_priv *gpt = get_irq_data(virq);
+       struct mpc52xx_gpt_priv *gpt = irq_get_handler_data(virq);
        int sub_virq;
        u32 status;
 
@@ -209,8 +209,8 @@ static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
        struct mpc52xx_gpt_priv *gpt = h->host_data;
 
        dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);
-       set_irq_chip_data(virq, gpt);
-       set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
+       irq_set_chip_data(virq, gpt);
+       irq_set_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
 
        return 0;
 }
@@ -259,8 +259,8 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
        }
 
        gpt->irqhost->host_data = gpt;
-       set_irq_data(cascade_virq, gpt);
-       set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
+       irq_set_handler_data(cascade_virq, gpt);
+       irq_set_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
 
        /* If the GPT is currently disabled, then change it to be in Input
         * Capture mode.  If the mode is non-zero, then the pin could be