#include <linux/pata_platform.h>
#include <linux/serial_8250.h>
#include <linux/sm501.h>
+#include <linux/sm501-regs.h>
#include <linux/pm.h>
#include <linux/fb.h>
#include <asm/machvec.h>
#include <asm/rts7751r2d.h>
-#include <asm/voyagergx.h>
#include <asm/io.h>
-static void __init voyagergx_serial_init(void)
-{
- unsigned long val;
-
- /*
- * GPIO Control
- */
- val = readl((void __iomem *)GPIO_MUX_HIGH);
- val |= 0x00001fe0;
- writel(val, (void __iomem *)GPIO_MUX_HIGH);
-
- /*
- * Power Mode Gate
- */
- val = readl((void __iomem *)POWER_MODE0_GATE);
- val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
- writel(val, (void __iomem *)POWER_MODE0_GATE);
-
- val = readl((void __iomem *)POWER_MODE1_GATE);
- val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
- writel(val, (void __iomem *)POWER_MODE1_GATE);
-}
-
static struct resource cf_ide_resources[] = {
[0] = {
.start = PA_AREA5_IO + 0x1000,
#ifdef CONFIG_MFD_SM501
static struct plat_serial8250_port uart_platform_data[] = {
{
- .membase = (void __iomem *)VOYAGER_UART_BASE,
- .mapbase = VOYAGER_UART_BASE,
+ .membase = (void __iomem *)0xb3e30000,
+ .mapbase = 0xb3e30000,
.iotype = UPIO_MEM,
- .irq = IRQ_SM501_U0,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+ .irq = IRQ_VOYAGER,
+ .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
.regshift = 2,
.uartclk = (9600 * 16),
},
.flags = IORESOURCE_MEM,
},
[2] = {
- .start = IRQ_SM501_CV,
+ .start = IRQ_VOYAGER,
.flags = IORESOURCE_IRQ,
},
};
.flags = SM501_FBPD_SWAP_FB_ENDIAN,
};
+static struct sm501_initdata sm501_initdata = {
+ .gpio_high = {
+ .set = 0x00001fe0,
+ .mask = 0x0,
+ },
+};
+
static struct sm501_platdata sm501_platform_data = {
+ .init = &sm501_initdata,
.fb = &sm501_fb_pdata,
};
*/
static void __init rts7751r2d_setup(char **cmdline_p)
{
+ void __iomem *sm501_reg;
u16 ver = ctrl_inw(PA_VERREG);
printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
ctrl_outw(0x0000, PA_OUTPORT);
pm_power_off = rts7751r2d_power_off;
- voyagergx_serial_init();
+ /* sm501 dram configuration:
+ * ColSizeX = 11 - External Memory Column Size: 256 words.
+ * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
+ * RstX = 1 - External Memory Reset: Normal.
+ * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
+ * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
+ * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
+ * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
+ * Rst = 1 - Internal Memory Reset: Normal.
+ * RA = 1 - Internal Memory Remain in Active State: Do not remain.
+ */
+
+ sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
+ writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
+
+ /*
+ * Power Mode Gate - Enable UART0
+ */
+
+ sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_0_GATE;
+ writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
+
+ sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_1_GATE;
+ writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
}
/*
.mv_irq_demux = rts7751r2d_irq_demux,
.mv_writeb = rts7751r2d_writeb,
.mv_readb = rts7751r2d_readb,
-#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD)
- .mv_consistent_alloc = voyagergx_consistent_alloc,
- .mv_consistent_free = voyagergx_consistent_free,
-#endif
};