[PATCH] sparc64 pt_regs fixes

[deliverable/linux.git] / arch / sparc64 / kernel / smp.c

diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 4e8cd79156e0e0adc4a737265290f1e7cf496871..cc09d826641452998efbaa2df0ee8bb359cac524 100644 (file)
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -31,6 +31,7 @@
 #include <asm/cpudata.h>
 
 #include <asm/irq.h>
+#include <asm/irq_regs.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/oplib.h>
@@ -39,6 +40,7 @@
 #include <asm/starfire.h>
 #include <asm/tlb.h>
 #include <asm/sections.h>
+#include <asm/prom.h>
 
 extern void calibrate_delay(void);
 
@@ -76,41 +78,42 @@ void smp_bogo(struct seq_file *m)
 
 void __init smp_store_cpu_info(int id)
 {
-       int cpu_node, def;
+       struct device_node *dp;
+       int def;
 
        /* multiplier and counter set by
           smp_setup_percpu_timer()  */
        cpu_data(id).udelay_val                 = loops_per_jiffy;
 
-       cpu_find_by_mid(id, &cpu_node);
-       cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
-                                                    "clock-frequency", 0);
+       cpu_find_by_mid(id, &dp);
+       cpu_data(id).clock_tick =
+               of_getintprop_default(dp, "clock-frequency", 0);
 
        def = ((tlb_type == hypervisor) ? (8 * 1024) : (16 * 1024));
-       cpu_data(id).dcache_size = prom_getintdefault(cpu_node, "dcache-size",
-                                                     def);
+       cpu_data(id).dcache_size =
+               of_getintprop_default(dp, "dcache-size", def);
 
        def = 32;
        cpu_data(id).dcache_line_size =
-               prom_getintdefault(cpu_node, "dcache-line-size", def);
+               of_getintprop_default(dp, "dcache-line-size", def);
 
        def = 16 * 1024;
-       cpu_data(id).icache_size = prom_getintdefault(cpu_node, "icache-size",
-                                                     def);
+       cpu_data(id).icache_size =
+               of_getintprop_default(dp, "icache-size", def);
 
        def = 32;
        cpu_data(id).icache_line_size =
-               prom_getintdefault(cpu_node, "icache-line-size", def);
+               of_getintprop_default(dp, "icache-line-size", def);
 
        def = ((tlb_type == hypervisor) ?
               (3 * 1024 * 1024) :
               (4 * 1024 * 1024));
-       cpu_data(id).ecache_size = prom_getintdefault(cpu_node, "ecache-size",
-                                                     def);
+       cpu_data(id).ecache_size =
+               of_getintprop_default(dp, "ecache-size", def);
 
        def = 64;
        cpu_data(id).ecache_line_size =
-               prom_getintdefault(cpu_node, "ecache-line-size", def);
+               of_getintprop_default(dp, "ecache-line-size", def);
 
        printk("CPU[%d]: Caches "
               "D[sz(%d):line_sz(%d)] "
@@ -342,10 +345,10 @@ static int __devinit smp_boot_one_cpu(unsigned int cpu)
 
                prom_startcpu_cpuid(cpu, entry, cookie);
        } else {
-               int cpu_node;
+               struct device_node *dp;
 
-               cpu_find_by_mid(cpu, &cpu_node);
-               prom_startcpu(cpu_node, entry, cookie);
+               cpu_find_by_mid(cpu, &dp);
+               prom_startcpu(dp->node, entry, cookie);
        }
 
        for (timeout = 0; timeout < 5000000; timeout++) {
@@ -1185,6 +1188,7 @@ void smp_percpu_timer_interrupt(struct pt_regs *regs)
        unsigned long compare, tick, pstate;
        int cpu = smp_processor_id();
        int user = user_mode(regs);
+       struct pt_regs *old_regs;
 
        /*
         * Check for level 14 softint.
@@ -1201,8 +1205,9 @@ void smp_percpu_timer_interrupt(struct pt_regs *regs)
                clear_softint(tick_mask);
        }
 
+       old_regs = set_irq_regs(regs);
        do {
-               profile_tick(CPU_PROFILING, regs);
+               profile_tick(CPU_PROFILING);
                if (!--prof_counter(cpu)) {
                        irq_enter();
 
@@ -1234,6 +1239,7 @@ void smp_percpu_timer_interrupt(struct pt_regs *regs)
                                     : /* no outputs */
                                     : "r" (pstate));
        } while (time_after_eq(tick, compare));
+       set_irq_regs(old_regs);
 }
 
 static void __init smp_setup_percpu_timer(void)
@@ -1287,6 +1293,41 @@ int setup_profiling_timer(unsigned int multiplier)
        return 0;
 }
 
+static void __init smp_tune_scheduling(void)
+{
+       struct device_node *dp;
+       int instance;
+       unsigned int def, smallest = ~0U;
+
+       def = ((tlb_type == hypervisor) ?
+              (3 * 1024 * 1024) :
+              (4 * 1024 * 1024));
+
+       instance = 0;
+       while (!cpu_find_by_instance(instance, &dp, NULL)) {
+               unsigned int val;
+
+               val = of_getintprop_default(dp, "ecache-size", def);
+               if (val < smallest)
+                       smallest = val;
+
+               instance++;
+       }
+
+       /* Any value less than 256K is nonsense.  */
+       if (smallest < (256U * 1024U))
+               smallest = 256 * 1024;
+
+       max_cache_size = smallest;
+
+       if (smallest < 1U * 1024U * 1024U)
+               printk(KERN_INFO "Using max_cache_size of %uKB\n",
+                      smallest / 1024U);
+       else
+               printk(KERN_INFO "Using max_cache_size of %uMB\n",
+                      smallest / 1024U / 1024U);
+}
+
 /* Constrain the number of cpus to max_cpus.  */
 void __init smp_prepare_cpus(unsigned int max_cpus)
 {
@@ -1322,6 +1363,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
        }
 
        smp_store_cpu_info(boot_cpu_id);
+       smp_tune_scheduling();
 }
 
 /* Set this up early so that things like the scheduler can init