Merge tag 'leds_for_4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewsk...

[deliverable/linux.git] / arch / x86 / events / perf_event.h

diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index ad4dc7ffffb5eb44eeb79c08e924697547f14ebd..8c4a47706296ab49a2c3825c6312e207e608bdeb 100644 (file)
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -601,6 +601,7 @@ struct x86_pmu {
        u64             lbr_sel_mask;              /* LBR_SELECT valid bits */
        const int       *lbr_sel_map;              /* lbr_select mappings */
        bool            lbr_double_abort;          /* duplicated lbr aborts */
+       bool            lbr_pt_coexist;            /* LBR may coexist with PT */
 
        /*
         * Intel PT/LBR/BTS are exclusive
@@ -667,6 +668,14 @@ static struct perf_pmu_events_attr event_attr_##v = {                      \
        .event_str      = str,                                          \
 };
 
+#define EVENT_ATTR_STR_HT(_name, v, noht, ht)                          \
+static struct perf_pmu_events_ht_attr event_attr_##v = {               \
+       .attr           = __ATTR(_name, 0444, events_ht_sysfs_show, NULL),\
+       .id             = 0,                                            \
+       .event_str_noht = noht,                                         \
+       .event_str_ht   = ht,                                           \
+}
+
 extern struct x86_pmu x86_pmu __read_mostly;
 
 static inline bool x86_pmu_has_lbr_callstack(void)
@@ -802,6 +811,8 @@ struct attribute **merge_attr(struct attribute **a, struct attribute **b);
 
 ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
                          char *page);
+ssize_t events_ht_sysfs_show(struct device *dev, struct device_attribute *attr,
+                         char *page);
 
 #ifdef CONFIG_CPU_SUP_AMD
 
@@ -859,6 +870,8 @@ extern struct event_constraint intel_atom_pebs_event_constraints[];
 
 extern struct event_constraint intel_slm_pebs_event_constraints[];
 
+extern struct event_constraint intel_glm_pebs_event_constraints[];
+
 extern struct event_constraint intel_nehalem_pebs_event_constraints[];
 
 extern struct event_constraint intel_westmere_pebs_event_constraints[];
@@ -889,6 +902,8 @@ void intel_ds_init(void);
 
 void intel_pmu_lbr_sched_task(struct perf_event_context *ctx, bool sched_in);
 
+u64 lbr_from_signext_quirk_wr(u64 val);
+
 void intel_pmu_lbr_reset(void);
 
 void intel_pmu_lbr_enable(struct perf_event *event);
@@ -907,6 +922,8 @@ void intel_pmu_lbr_init_nhm(void);
 
 void intel_pmu_lbr_init_atom(void);
 
+void intel_pmu_lbr_init_slm(void);
+
 void intel_pmu_lbr_init_snb(void);
 
 void intel_pmu_lbr_init_hsw(void);