x86, 32-bit: trim memory not covered by wb mtrrs

[deliverable/linux.git] / arch / x86 / kernel / io_apic_32.c

diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c
index c3a565bba106e5058d1465462b3656b0ee8e05a8..4ca548632c8dfa61e5a8a95be00a8cb9d1f97fca 100644 (file)
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@ -35,6 +35,7 @@
 #include <linux/htirq.h>
 #include <linux/freezer.h>
 #include <linux/kthread.h>
+#include <linux/jiffies.h>     /* time_after() */
 
 #include <asm/io.h>
 #include <asm/smp.h>
@@ -48,8 +49,6 @@
 #include <mach_apic.h>
 #include <mach_apicdef.h>
 
-#include "io_ports.h"
-
 int (*ioapic_renumber_irq)(int ioapic, int irq);
 atomic_t irq_mis_count;
 
@@ -351,7 +350,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
 # include <asm/processor.h>    /* kernel_thread() */
 # include <linux/kernel_stat.h>        /* kstat */
 # include <linux/slab.h>               /* kmalloc() */
-# include <linux/timer.h>      /* time_after() */
+# include <linux/timer.h>
  
 #define IRQBALANCE_CHECK_ARCH -999
 #define MAX_BALANCED_IRQ_INTERVAL      (5*HZ)
@@ -727,7 +726,7 @@ late_initcall(balanced_irq_init);
 #endif /* CONFIG_SMP */
 
 #ifndef CONFIG_SMP
-void fastcall send_IPI_self(int vector)
+void send_IPI_self(int vector)
 {
        unsigned int cfg;
 
@@ -1900,7 +1899,7 @@ static int __init timer_irq_works(void)
         * might have cached one ExtINT interrupt.  Finally, at
         * least one tick may be lost due to delays.
         */
-       if (jiffies - t1 > 4)
+       if (time_after(jiffies, t1 + 4))
                return 1;
 
        return 0;
@@ -2080,7 +2079,7 @@ static struct irq_chip lapic_chip __read_mostly = {
        .eoi            = ack_apic,
 };
 
-static void setup_nmi (void)
+static void __init setup_nmi(void)
 {
        /*
         * Dirty trick to enable the NMI watchdog ...
@@ -2093,7 +2092,7 @@ static void setup_nmi (void)
         */ 
        apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ...");
 
-       on_each_cpu(enable_NMI_through_LVT0, NULL, 1, 1);
+       enable_NMI_through_LVT0();
 
        apic_printk(APIC_VERBOSE, " done.\n");
 }
@@ -2169,14 +2168,10 @@ static inline void __init check_timer(void)
 {
        int apic1, pin1, apic2, pin2;
        int vector;
-       unsigned int ver;
        unsigned long flags;
 
        local_irq_save(flags);
 
-       ver = apic_read(APIC_LVR);
-       ver = GET_APIC_VERSION(ver);
-
        /*
         * get/set the timer IRQ vector:
         */
@@ -2189,15 +2184,11 @@ static inline void __init check_timer(void)
         * mode for the 8259A whenever interrupts are routed
         * through I/O APICs.  Also IRQ0 has to be enabled in
         * the 8259A which implies the virtual wire has to be
-        * disabled in the local APIC.  Finally timer interrupts
-        * need to be acknowledged manually in the 8259A for
-        * timer_interrupt() and for the i82489DX when using
-        * the NMI watchdog.
+        * disabled in the local APIC.
         */
        apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
        init_8259A(1);
-       timer_ack = !cpu_has_tsc;
-       timer_ack |= (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
+       timer_ack = 1;
        if (timer_over_8254 > 0)
                enable_8259A_irq(0);
 
@@ -2409,7 +2400,7 @@ static int ioapic_resume(struct sys_device *dev)
 }
 
 static struct sysdev_class ioapic_sysdev_class = {
-       set_kset_name("ioapic"),
+       .name = "ioapic",
        .suspend = ioapic_suspend,
        .resume = ioapic_resume,
 };