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x86: I/O APIC: keep the timer IRQ masked during set-up
[deliverable/linux.git]
/
arch
/
x86
/
kernel
/
io_apic_64.c
diff --git
a/arch/x86/kernel/io_apic_64.c
b/arch/x86/kernel/io_apic_64.c
index 0e20b7d7c1c761028dfda593f310be2fc153df4e..ae0ac990574fa4ea2cd3f01418413a9d00abbade 100644
(file)
--- a/
arch/x86/kernel/io_apic_64.c
+++ b/
arch/x86/kernel/io_apic_64.c
@@
-911,7
+911,7
@@
static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
* to the first CPU.
*/
entry.dest_mode = INT_DEST_MODE;
- entry.mask =
0; /* un
mask IRQ now */
+ entry.mask =
1; /*
mask IRQ now */
entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
entry.delivery_mode = INT_DELIVERY_MODE;
entry.polarity = 0;
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