PowerPC64 higher REL16 relocations

[deliverable/binutils-gdb.git] / bfd / ChangeLog

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 0f292a5fbf5828a59e4b04e207d9700efbba8730..8538bcd943f5a2c3ace4066140f548e374ce283b 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,77 @@
+2018-08-31  Alan Modra  <amodra@gmail.com>
+
+       * reloc.c (BFD_RELOC_PPC64_REL16_HIGH, BFD_RELOC_PPC64_REL16_HIGHA),
+       (BFD_RELOC_PPC64_REL16_HIGHER, BFD_RELOC_PPC64_REL16_HIGHERA),
+       (BFD_RELOC_PPC64_REL16_HIGHEST, BFD_RELOC_PPC64_REL16_HIGHESTA):
+       Define.
+       * elf64-ppc.c (ppc64_elf_howto_raw): Add new REL16 howtos.
+       (ppc64_elf_reloc_type_lookup): Translate new REL16 relocs.
+       (ppc64_elf_check_relocs, ppc64_elf_relocate_section): Handle them.
+       * bfd-in2.h: Regenerate.
+       * libbfd.h: Regenerate.
+
+2018-08-31  Alan Modra  <amodra@gmail.com>
+
+       * elf64-ppc.c: Correct _notoc stub comments.
+       (ppc_build_one_stub): Simplify output of branch for notoc
+       long branch stub.  Don't include label offset of 8 bytes in
+       "off" calculation for notoc plt stub.  Don't emit insns to get pc.
+       (build_offset): Emit insns to get pc here instead.
+       (size_offset): Add 4 extra insns.
+       (plt_stub_size): Adjust for "off" and size_offset changes.
+       (ppc_size_one_stub): Rearrange code into a switch, duplicating
+       some to better match ppc_build_one_stub.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * archures.c (bfd_architecture): New machine
+       bfd_mach_mips_gs264e.
+       * bfd-in2.h (bfd_architecture): Likewise.
+       * cpu-mips.c (enum I_xxx): Likewise.
+       (arch_info_struct): Likewise.
+       * elfxx-mips.c (_bfd_elf_mips_mach): Handle
+       E_MIPS_MACH_GS264E.
+       (mips_set_isa_flags): Likewise.
+       (mips_mach_extensions): Map bfd_mach_mips_gs264e to
+       bfd_mach_mips_gs464e extension.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * archures.c (bfd_architecture): New machine
+       bfd_mach_mips_gs464e.
+       * bfd-in2.h (bfd_architecture): Likewise.
+       * cpu-mips.c (enum I_xxx): Likewise.
+       (arch_info_struct): Likewise.
+       * elfxx-mips.c (_bfd_elf_mips_mach): Handle
+       E_MIPS_MACH_GS464E.
+       (mips_set_isa_flags): Likewise.
+       (mips_mach_extensions): Map bfd_mach_mips_gs464e to
+       bfd_mach_mips_gs464 extension.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * archures.c (bfd_architecture): Rename
+       bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464.
+       * bfd-in2.h (bfd_architecture): Likewise.
+       * cpu-mips.c (enum I_xxx): Likewise.
+       (arch_info_struct): Likewise.
+       * elfxx-mips.c (_bfd_elf_mips_mach): Likewise.
+       (mips_set_isa_flags): Likewise.
+       (mips_mach_extensions): Likewise.
+       (bfd_mips_isa_ext_mach): Likewise.
+       (bfd_mips_isa_ext): Likewise.
+       (print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * elfxx-mips.c (print_mips_ases): Add Loongson EXT2 extension.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+        * elfxx-mips.c (infer_mips_abiflags): Use ases instead of
+        isa_ext for infer ABI flags.
+        (print_mips_ases): Add Loongson EXT extension.
+
 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 
        * elfxx-mips.c (print_mips_ases): Add CAM extension.