PowerPC64 higher REL16 relocations
[deliverable/binutils-gdb.git] / bfd / ChangeLog
index f24ef2be137827cd7ae4db7255aefb7464ab37e0..8538bcd943f5a2c3ace4066140f548e374ce283b 100644 (file)
@@ -1,3 +1,141 @@
+2018-08-31  Alan Modra  <amodra@gmail.com>
+
+       * reloc.c (BFD_RELOC_PPC64_REL16_HIGH, BFD_RELOC_PPC64_REL16_HIGHA),
+       (BFD_RELOC_PPC64_REL16_HIGHER, BFD_RELOC_PPC64_REL16_HIGHERA),
+       (BFD_RELOC_PPC64_REL16_HIGHEST, BFD_RELOC_PPC64_REL16_HIGHESTA):
+       Define.
+       * elf64-ppc.c (ppc64_elf_howto_raw): Add new REL16 howtos.
+       (ppc64_elf_reloc_type_lookup): Translate new REL16 relocs.
+       (ppc64_elf_check_relocs, ppc64_elf_relocate_section): Handle them.
+       * bfd-in2.h: Regenerate.
+       * libbfd.h: Regenerate.
+
+2018-08-31  Alan Modra  <amodra@gmail.com>
+
+       * elf64-ppc.c: Correct _notoc stub comments.
+       (ppc_build_one_stub): Simplify output of branch for notoc
+       long branch stub.  Don't include label offset of 8 bytes in
+       "off" calculation for notoc plt stub.  Don't emit insns to get pc.
+       (build_offset): Emit insns to get pc here instead.
+       (size_offset): Add 4 extra insns.
+       (plt_stub_size): Adjust for "off" and size_offset changes.
+       (ppc_size_one_stub): Rearrange code into a switch, duplicating
+       some to better match ppc_build_one_stub.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * archures.c (bfd_architecture): New machine
+       bfd_mach_mips_gs264e.
+       * bfd-in2.h (bfd_architecture): Likewise.
+       * cpu-mips.c (enum I_xxx): Likewise.
+       (arch_info_struct): Likewise.
+       * elfxx-mips.c (_bfd_elf_mips_mach): Handle
+       E_MIPS_MACH_GS264E.
+       (mips_set_isa_flags): Likewise.
+       (mips_mach_extensions): Map bfd_mach_mips_gs264e to
+       bfd_mach_mips_gs464e extension.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * archures.c (bfd_architecture): New machine
+       bfd_mach_mips_gs464e.
+       * bfd-in2.h (bfd_architecture): Likewise.
+       * cpu-mips.c (enum I_xxx): Likewise.
+       (arch_info_struct): Likewise.
+       * elfxx-mips.c (_bfd_elf_mips_mach): Handle
+       E_MIPS_MACH_GS464E.
+       (mips_set_isa_flags): Likewise.
+       (mips_mach_extensions): Map bfd_mach_mips_gs464e to
+       bfd_mach_mips_gs464 extension.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * archures.c (bfd_architecture): Rename
+       bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464.
+       * bfd-in2.h (bfd_architecture): Likewise.
+       * cpu-mips.c (enum I_xxx): Likewise.
+       (arch_info_struct): Likewise.
+       * elfxx-mips.c (_bfd_elf_mips_mach): Likewise.
+       (mips_set_isa_flags): Likewise.
+       (mips_mach_extensions): Likewise.
+       (bfd_mips_isa_ext_mach): Likewise.
+       (bfd_mips_isa_ext): Likewise.
+       (print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * elfxx-mips.c (print_mips_ases): Add Loongson EXT2 extension.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+        * elfxx-mips.c (infer_mips_abiflags): Use ases instead of
+        isa_ext for infer ABI flags.
+        (print_mips_ases): Add Loongson EXT extension.
+
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+       * elfxx-mips.c (print_mips_ases): Add CAM extension.
+
+2018-08-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Don't mask
+       out the GNU_PROPERTY_X86_UINT32_VALID bit.
+
+2018-08-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/23499
+       * elf.c (_bfd_elf_get_symbol_version_string): Return
+       _("<corrupt>") for corrupt symbol version info.
+
+2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Handle
+       X86_COMPAT_ISA_1_USED, X86_COMPAT_ISA_1_NEEDED,
+       X86_UINT32_AND_LO, X86_UINT32_AND_HI, X86_UINT32_OR_LO,
+       X86_UINT32_OR_HI, X86_UINT32_OR_AND_LO and X86_UINT32_OR_AND_HI
+       instead of X86_ISA_1_USED, X86_ISA_1_NEEDED and X86_FEATURE_1_AND.
+       (_bfd_x86_elf_merge_gnu_properties): Likewise.
+       (_bfd_x86_elf_link_setup_gnu_properties): Add X86_FEATURE_2_NEEDED
+       instead of X86_ISA_1_NEEDED.
+       (_bfd_x86_elf_link_fixup_gnu_properties): Handle
+       X86_COMPAT_ISA_1_USED, X86_COMPAT_ISA_1_NEEDED, X86_UINT32_AND_LO,
+       X86_UINT32_AND_HI, X86_UINT32_OR_LO, X86_UINT32_OR_HI,
+       X86_UINT32_OR_AND_LO and X86_UINT32_OR_AND_HI instead of
+       X86_ISA_1_USED, X86_ISA_1_NEEDED and X86_FEATURE_1_AND.
+
+2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Mask out the
+       GNU_PROPERTY_X86_UINT32_VALID bit.
+       (_bfd_x86_elf_link_fixup_gnu_properties): Set the
+       GNU_PROPERTY_X86_UINT32_VALID bit for non-relocatable output.
+
+2018-08-23  Zenith423  <zenith432@users.sourceforge.net>
+
+       PR 23460
+       * plugin.c (struct plugin_list_entry): New structure.
+       (plugin_list): New variable.
+       (try_load_plugin): Place opened plugins on a list.  Ensure that
+       the refcount in the dynamic loader is kept at 1.
+
+2018-08-23  Alan Modra  <amodra@gmail.com>
+
+       * elf64-ppc.c (ppc64_elf_relocate_section): Revise "call lacks
+       nop" error message.
+
+2018-08-23  Nick Clifton  <nickc@redhat.com>
+
+       * elf64-hppa.c (elf_hppa_final_link_relocate): Replace unworkable
+       code with an assertion.
+
+2018-08-23  Nick Clifton  <nickc@redhat.com>
+
+       PR 23061
+       * coffgen.c (coff_pointerize_aux): Add table_end parameter.  Use
+       it to prevent walking off the end of the table.
+       (coff_get_normalized_symtab): Pass internal_end pointer to
+       coff_pointerize_aux.
+
 2018-08-23  Alan Modra  <amodra@gmail.com>
 
        * elf64-ppc.c (ppc64_elf_relocate_section): Don't miss clearing
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