.#define bfd_mach_m68040 6
.#define bfd_mach_m68060 7
.#define bfd_mach_cpu32 8
-.#define bfd_mach_mcf_isa_a 9
-.#define bfd_mach_mcf_isa_a_div 10
-.#define bfd_mach_mcf_isa_a_div_mac 11
-.#define bfd_mach_mcf_isa_a_div_emac 12
+.#define bfd_mach_mcf_isa_a_nodiv 9
+.#define bfd_mach_mcf_isa_a 10
+.#define bfd_mach_mcf_isa_a_mac 11
+.#define bfd_mach_mcf_isa_a_emac 12
.#define bfd_mach_mcf_isa_aplus 13
.#define bfd_mach_mcf_isa_aplus_mac 14
.#define bfd_mach_mcf_isa_aplus_emac 15
-.#define bfd_mach_mcf_isa_aplus_usp 16
-.#define bfd_mach_mcf_isa_aplus_usp_mac 17
-.#define bfd_mach_mcf_isa_aplus_usp_emac 18
+.#define bfd_mach_mcf_isa_b_nousp 16
+.#define bfd_mach_mcf_isa_b_nousp_mac 17
+.#define bfd_mach_mcf_isa_b_nousp_emac 18
.#define bfd_mach_mcf_isa_b 19
.#define bfd_mach_mcf_isa_b_mac 20
.#define bfd_mach_mcf_isa_b_emac 21
-.#define bfd_mach_mcf_isa_b_usp_float 22
-.#define bfd_mach_mcf_isa_b_usp_float_mac 23
-.#define bfd_mach_mcf_isa_b_usp_float_emac 24
+.#define bfd_mach_mcf_isa_b_float 22
+.#define bfd_mach_mcf_isa_b_float_mac 23
+.#define bfd_mach_mcf_isa_b_float_emac 24
. bfd_arch_vax, {* DEC Vax *}
. bfd_arch_i960, {* Intel 960 *}
. {* The order of the following is important.
.#define bfd_mach_avr3 3
.#define bfd_mach_avr4 4
.#define bfd_mach_avr5 5
+.#define bfd_mach_avr6 6
. bfd_arch_bfin, {* ADI Blackfin *}
.#define bfd_mach_bfin 1
. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
break;
case 5200:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf_isa_a;
+ number = bfd_mach_mcf_isa_a_nodiv;
break;
case 5206:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf_isa_a_div_mac;
+ number = bfd_mach_mcf_isa_a_mac;
break;
case 5307:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf_isa_a_div_mac;
+ number = bfd_mach_mcf_isa_a_mac;
break;
case 5407:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf_isa_b_mac;
+ number = bfd_mach_mcf_isa_b_nousp_mac;
break;
case 5282:
arch = bfd_arch_m68k;
- number = bfd_mach_mcf_isa_b_usp_float_emac;
+ number = bfd_mach_mcf_isa_aplus_emac;
break;
case 32000: