/* Main header file for the bfd library -- portable access to object files.
- Copyright 1990, 91, 92, 93, 94, 95, 96, 97, 1998
+ Copyright 1990, 91, 92, 93, 94, 95, 96, 97, 98, 1999
Free Software Foundation, Inc.
Contributed by Cygnus Support.
PARAMS ((bfd *, struct bfd_link_info *));
/* ELF ARM Interworking support. Called from linker. */
- extern boolean bfd_elf32_arm_allocate_interworking_sections
- PARAMS ((struct bfd_link_info *));
-
- extern boolean bfd_elf32_arm_process_before_allocation
- PARAMS ((bfd *, struct bfd_link_info *));
-
- extern boolean bfd_elf32_arm_get_bfd_for_interworking
- PARAMS ((bfd *, struct bfd_link_info *));
+extern boolean bfd_elf32_arm_allocate_interworking_sections
+ PARAMS ((struct bfd_link_info *));
+
+extern boolean bfd_elf32_arm_process_before_allocation
+ PARAMS ((bfd *, struct bfd_link_info *, int));
+
+extern boolean bfd_elf32_arm_get_bfd_for_interworking
+ PARAMS ((bfd *, struct bfd_link_info *));
/* And more from the source. */
void
/* Byte swapping macros for user section data. */
#define bfd_put_8(abfd, val, ptr) \
- (*((unsigned char *)(ptr)) = (unsigned char)(val))
+ ((void) (*((unsigned char *)(ptr)) = (unsigned char)(val)))
#define bfd_put_signed_8 \
bfd_put_8
#define bfd_get_8(abfd, ptr) \
#define bfd_get_signed_64(abfd, ptr) \
BFD_SEND(abfd, bfd_getx_signed_64, (ptr))
+#define bfd_get(bits, abfd, ptr) \
+ ((bits) == 8 ? bfd_get_8 (abfd, ptr) \
+ : (bits) == 16 ? bfd_get_16 (abfd, ptr) \
+ : (bits) == 32 ? bfd_get_32 (abfd, ptr) \
+ : (bits) == 64 ? bfd_get_64 (abfd, ptr) \
+ : (abort (), (bfd_vma) - 1))
+
+#define bfd_put(bits, abfd, val, ptr) \
+ ((bits) == 8 ? bfd_put_8 (abfd, val, ptr) \
+ : (bits) == 16 ? bfd_put_16 (abfd, val, ptr) \
+ : (bits) == 32 ? bfd_put_32 (abfd, val, ptr) \
+ : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \
+ : (abort (), (void) 0))
+
/* Byte swapping macros for file header data. */
/* This section should not be subject to garbage collection. */
#define SEC_KEEP 0x1000000
+ /* This section contains "short" data, and should be placed
+ "near" the GP. */
+#define SEC_SHORT 0x2000000
+
/* End of section flags. */
/* Some internal packed boolean fields. */
#define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
BFD_SEND (obfd, _bfd_copy_private_section_data, \
(ibfd, isection, obfd, osection))
+void
+_bfd_strip_section_from_output
+ PARAMS ((asection *section));
+
enum bfd_architecture
{
bfd_arch_unknown, /* File arch not known */
#define bfd_mach_sparc_v9_p(mach) \
((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a)
bfd_arch_mips, /* MIPS Rxxxx */
- /* start-sanitize-tx19 */
-#define bfd_mach_mips1900 1900
- /* end-sanitize-tx19 */
#define bfd_mach_mips3000 3000
#define bfd_mach_mips3900 3900
#define bfd_mach_mips4000 4000
#define bfd_mach_mips4010 4010
#define bfd_mach_mips4100 4100
- /* start-sanitize-vr4xxx */
-#define bfd_mach_mips4121 4121
- /* end-sanitize-vr4xxx */
+#define bfd_mach_mips4111 4111
#define bfd_mach_mips4300 4300
#define bfd_mach_mips4400 4400
#define bfd_mach_mips4600 4600
#define bfd_mach_mips4650 4650
- /* start-sanitize-vr4320 */
-#define bfd_mach_mips4320 4320
- /* end-sanitize-vr4320 */
- /* start-sanitize-tx49 */
-#define bfd_mach_mips4900 4900
- /* end-sanitize-tx49 */
#define bfd_mach_mips5000 5000
- /* start-sanitize-cygnus */
-#define bfd_mach_mips5400 5400
- /* end-sanitize-cygnus */
- /* start-sanitize-r5900 */
-#define bfd_mach_mips5900 5900
- /* end-sanitize-r5900 */
#define bfd_mach_mips6000 6000
#define bfd_mach_mips8000 8000
#define bfd_mach_mips10000 10000
#define bfd_mach_mips16 16
- /* start-sanitize-sky */
- /* The DVP is a machine within the mips architecture. */
-#define bfd_mach_dvp_dma 42000
-#define bfd_mach_dvp_vif 42001
-#define bfd_mach_dvp_vu 42002
-#define bfd_mach_dvp_gif 42003
-#define bfd_mach_dvp_p(mach) ((mach) >= 42000 && (mach) <= 42003)
- /* end-sanitize-sky */
bfd_arch_i386, /* Intel 386 */
#define bfd_mach_i386_i386 0
#define bfd_mach_i386_i8086 1
+#define bfd_mach_i386_i386_intel_syntax 2
bfd_arch_we32k, /* AT&T WE32xxx */
bfd_arch_tahoe, /* CCI/Harris Tahoe */
bfd_arch_i860, /* Intel 860 */
#define bfd_mach_sh 0
#define bfd_mach_sh3 0x30
#define bfd_mach_sh3e 0x3e
-#define bfd_mach_sh4 0x40
bfd_arch_alpha, /* Dec Alpha */
#define bfd_mach_alpha_ev4 0x10
#define bfd_mach_alpha_ev5 0x20
#define bfd_mach_alpha_ev6 0x30
bfd_arch_arm, /* Advanced Risc Machines ARM */
#define bfd_mach_arm_2 1
-#define bfd_mach_arm_2a 2
+#define bfd_mach_arm_2a 2
#define bfd_mach_arm_3 3
#define bfd_mach_arm_3M 4
-#define bfd_mach_arm_4 5
+#define bfd_mach_arm_4 5
#define bfd_mach_arm_4T 6
+#define bfd_mach_arm_5 7
+#define bfd_mach_arm_5T 8
bfd_arch_ns32k, /* National Semiconductors ns32000 */
bfd_arch_w65, /* WDC 65816 */
bfd_arch_tic30, /* Texas Instruments TMS320C30 */
- /* start-sanitize-tic80 */
bfd_arch_tic80, /* TI TMS320c80 (MVP) */
- /* end-sanitize-tic80 */
bfd_arch_v850, /* NEC V850 */
#define bfd_mach_v850 0
- /* start-sanitize-v850e */
#define bfd_mach_v850e 'E'
#define bfd_mach_v850ea 'A'
- /* end-sanitize-v850e */
bfd_arch_arc, /* Argonaut RISC Core */
#define bfd_mach_arc_base 0
bfd_arch_m32r, /* Mitsubishi M32R/D */
#define bfd_mach_m32r 0 /* backwards compatibility */
- /* start-sanitize-m32rx */
-#define bfd_mach_m32rx 'x'
- /* end-sanitize-m32rx */
bfd_arch_mn10200, /* Matsushita MN10200 */
bfd_arch_mn10300, /* Matsushita MN10300 */
#define bfd_mach_mn10300 300
- /* start-sanitize-am33 */
-#define bfd_mach_am33 330
- /* end-sanitize-am33 */
bfd_arch_fr30,
#define bfd_mach_fr30 0x46523330
+ bfd_arch_mcore,
bfd_arch_last
};
{(unsigned)C,R,S,B, P, BI, O,SF,NAME,INPLACE,MASKSRC,MASKDST,PC}
#define NEWHOWTO( FUNCTION, NAME,SIZE,REL,IN) HOWTO(0,0,SIZE,0,REL,0,complain_overflow_dont,FUNCTION, NAME,false,0,0,IN)
+#define EMPTY_HOWTO(C) \
+ HOWTO((C),0,0,0,false,0,complain_overflow_dont,NULL,NULL,false,0,0,false)
+
#define HOWTO_PREPARE(relocation, symbol) \
{ \
if (symbol != (asymbol *)NULL) { \
PARAMS ((enum complain_overflow how,
unsigned int bitsize,
unsigned int rightshift,
+ unsigned int addrsize,
bfd_vma relocation));
bfd_reloc_status_type
BFD_RELOC_MIPS_GOT_LO16,
BFD_RELOC_MIPS_CALL_HI16,
BFD_RELOC_MIPS_CALL_LO16,
-/* start-sanitize-r5900 */
- BFD_RELOC_MIPS15_S3,
-/* end-sanitize-r5900 */
-/* start-sanitize-sky */
-
-/* MIPS DVP Relocations.
-This is an 11-bit pc relative reloc. The recorded address is for the
-lower instruction word, and the value is in 128 bit units. */
- BFD_RELOC_MIPS_DVP_11_PCREL,
-
-/* This is a 27 bit address left shifted by 4. */
- BFD_RELOC_MIPS_DVP_27_S4,
-
-/* This is the 11 bit offset operand of ilw/stw instructions
-left shifted by 4. */
- BFD_RELOC_MIPS_DVP_11_S4,
-
-/* This is the 15 bit unsigned immediate operand of the iaddiu instruction
-left shifted by 3. */
- BFD_RELOC_MIPS_DVP_U15_S3,
-/* end-sanitize-sky */
+ BFD_RELOC_MIPS_SUB,
+ BFD_RELOC_MIPS_GOT_PAGE,
+ BFD_RELOC_MIPS_GOT_OFST,
+ BFD_RELOC_MIPS_GOT_DISP,
/* i386/elf relocations */
/* These relocs are only used within the ARM assembler. They are not
(at present) written to any object files. */
BFD_RELOC_ARM_IMMEDIATE,
+ BFD_RELOC_ARM_ADRL_IMMEDIATE,
BFD_RELOC_ARM_OFFSET_IMM,
BFD_RELOC_ARM_SHIFT_IMM,
BFD_RELOC_ARM_SWI,
BFD_RELOC_ARM_THUMB_IMM,
BFD_RELOC_ARM_THUMB_SHIFT,
BFD_RELOC_ARM_THUMB_OFFSET,
+ BFD_RELOC_ARM_GOT12,
+ BFD_RELOC_ARM_GOT32,
+ BFD_RELOC_ARM_JUMP_SLOT,
+ BFD_RELOC_ARM_COPY,
+ BFD_RELOC_ARM_GLOB_DAT,
+ BFD_RELOC_ARM_PLT32,
+ BFD_RELOC_ARM_RELATIVE,
+ BFD_RELOC_ARM_GOTOFF,
+ BFD_RELOC_ARM_GOTPC,
/* Hitachi SH relocs. Not all of these appear in object files. */
BFD_RELOC_SH_PCDISP8BY2,
/* This is a 16 bit offset from the tiny data area pointer. */
BFD_RELOC_V850_TDA_16_16_OFFSET,
-/* start-sanitize-v850e */
/* This is a 5 bit offset (of which only 4 bits are used) from the tiny
data area pointer. */
/* This is a 16 bit offset from the call table base pointer. */
BFD_RELOC_V850_CALLT_16_16_OFFSET,
-/* end-sanitize-v850e */
/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
short offset into 11 bits. */
BFD_RELOC_FR30_12_PCREL,
+/* Motorola Mcore relocations. */
+ BFD_RELOC_MCORE_PCREL_IMM8BY4,
+ BFD_RELOC_MCORE_PCREL_IMM11BY2,
+ BFD_RELOC_MCORE_PCREL_IMM4BY2,
+ BFD_RELOC_MCORE_PCREL_32,
+ BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2,
+ BFD_RELOC_MCORE_RVA,
+
/* These two relocations are used by the linker to determine which of
the entries in a C++ virtual function table are actually used. When
the --gc-sections option is given, the linker will zero out the entries
long (*_bfd_canonicalize_dynamic_reloc)
PARAMS ((bfd *, arelent **, struct symbol_cache_entry **));
+ /* Opposite endian version of this target. */
+ const struct bfd_target * alternative_target;
+
PTR backend_data;
+
} bfd_target;
boolean
bfd_set_default_target PARAMS ((const char *name));
const char **
bfd_target_list PARAMS ((void));
+const bfd_target *
+bfd_search_for_target PARAMS ((int (* search_func)(const bfd_target *, void *), void *));
+
boolean
bfd_check_format PARAMS ((bfd *abfd, bfd_format format));
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