#define bfd_section_name(bfd, ptr) ((ptr)->name)
#define bfd_section_size(bfd, ptr) (bfd_get_section_size_before_reloc(ptr))
#define bfd_section_vma(bfd, ptr) ((ptr)->vma)
+#define bfd_section_lma(bfd, ptr) ((ptr)->lma)
#define bfd_section_alignment(bfd, ptr) ((ptr)->alignment_power)
#define bfd_get_section_flags(bfd, ptr) ((ptr)->flags + 0)
#define bfd_get_section_userdata(bfd, ptr) ((ptr)->userdata)
PARAMS ((bfd *, struct bfd_link_info *));
extern boolean bfd_m68klinux_size_dynamic_sections
PARAMS ((bfd *, struct bfd_link_info *));
+extern boolean bfd_sparclinux_size_dynamic_sections
+ PARAMS ((bfd *, struct bfd_link_info *));
/* mmap hacks */
bfd_fdopenr PARAMS ((CONST char *filename, CONST char *target, int fd));
bfd *
-bfd_openstreamr PARAMS (());
+bfd_openstreamr PARAMS ((const char *, const char *, PTR));
bfd *
bfd_openw PARAMS ((CONST char *filename, CONST char *target));
#define bfd_mach_z8002 2
bfd_arch_h8500, /* Hitachi H8/500 */
bfd_arch_sh, /* Hitachi SH */
+#define bfd_mach_sh 0
+#define bfd_mach_sh3 0x30
+#define bfd_mach_sh3e 0x3e
+ /* start-sanitize-sh4 */
+#define bfd_mach_sh4 0x40
+ /* end-sanitize-sh4 */
bfd_arch_alpha, /* Dec Alpha */
bfd_arch_arm, /* Advanced Risc Machines ARM */
+#define bfd_mach_arm_2 1
+#define bfd_mach_arm_2a 2
+#define bfd_mach_arm_3 3
+#define bfd_mach_arm_3M 4
+#define bfd_mach_arm_4 5
+#define bfd_mach_arm_4T 6
bfd_arch_ns32k, /* National Semiconductors ns32000 */
bfd_arch_w65, /* WDC 65816 */
/* start-sanitize-tic80 */
bfd_arch_tic80, /* TI TMS320c80 (MVP) */
/* end-sanitize-tic80 */
- /* start-sanitize-v850 */
bfd_arch_v850, /* NEC V850 */
- /* end-sanitize-v850 */
- /* start-sanitize-arc */
+#define bfd_mach_v850 0
+ /* start-sanitize-v850e */
+#define bfd_mach_v850e 'E'
+#define bfd_mach_v850eq 'Q'
+ /* end-sanitize-v850e */
bfd_arch_arc, /* Argonaut RISC Core */
#define bfd_mach_arc_base 0
-#define bfd_mach_arc_host 1
-#define bfd_mach_arc_graphics 2
-#define bfd_mach_arc_audio 3
- /* end-sanitize-arc */
- /* start-sanitize-m32r */
- bfd_arch_m32r, /* Mitsubishi M32R */
- /* end-sanitize-m32r */
+ bfd_arch_m32r, /* Mitsubishi M32R/D */
bfd_arch_mn10200, /* Matsushita MN10200 */
bfd_arch_mn10300, /* Matsushita MN10300 */
bfd_arch_last
const bfd_arch_info_type *
bfd_scan_arch PARAMS ((const char *string));
+const char **
+bfd_arch_list PARAMS ((void));
+
const bfd_arch_info_type *
bfd_arch_get_compatible PARAMS ((
const bfd *abfd,
} arelent_chain;
bfd_reloc_status_type
+bfd_check_overflow
+ PARAMS ((enum complain_overflow how,
+ unsigned int bitsize,
+ unsigned int rightshift,
+ bfd_vma value));
+
+bfd_reloc_status_type
+
bfd_perform_relocation
PARAMS ((bfd *abfd,
arelent *reloc_entry,
BFD_RELOC_SPARC_BASE13,
BFD_RELOC_SPARC_BASE22,
-/* Some relocations we're using for SPARC V9 -- subject to change. */
+/* SPARC64 relocations */
#define BFD_RELOC_SPARC_64 BFD_RELOC_64
BFD_RELOC_SPARC_10,
BFD_RELOC_SPARC_11,
BFD_RELOC_SPARC_PC_LM22,
BFD_RELOC_SPARC_WDISP16,
BFD_RELOC_SPARC_WDISP19,
- BFD_RELOC_SPARC_GLOB_JMP,
BFD_RELOC_SPARC_7,
BFD_RELOC_SPARC_6,
BFD_RELOC_SPARC_5,
+#define BFD_RELOC_SPARC_DISP64 BFD_RELOC_64_PCREL
+ BFD_RELOC_SPARC_PLT64,
+ BFD_RELOC_SPARC_HIX22,
+ BFD_RELOC_SPARC_LOX10,
+ BFD_RELOC_SPARC_H44,
+ BFD_RELOC_SPARC_M44,
+ BFD_RELOC_SPARC_L44,
+ BFD_RELOC_SPARC_REGISTER,
/* Alpha ECOFF and ELF relocations. Some of these treat the symbol or
"addend" in some special way.
BFD_RELOC_SH_CODE,
BFD_RELOC_SH_DATA,
BFD_RELOC_SH_LABEL,
-/* start-sanitize-arc */
+
+/* Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
+be zero and is not stored in the instruction. */
+ BFD_RELOC_THUMB_PCREL_BRANCH9,
+ BFD_RELOC_THUMB_PCREL_BRANCH12,
+ BFD_RELOC_THUMB_PCREL_BRANCH23,
/* Argonaut RISC Core (ARC) relocs.
ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
stored in the instruction. The high 24 bits are installed in bits 23
through 0. */
BFD_RELOC_ARC_B26,
-/* end-sanitize-arc */
-
/* Mitsubishi D10V relocs.
This is a 10-bit reloc with the right 2 bits
This is a 6-bit absolute reloc. */
BFD_RELOC_D30V_6,
-/* Mitsubishi D30V relocs.
-This is a 12-bit absolute reloc with the
+/* This is a 6-bit pc-relative reloc with
+the right 3 bits assumed to be 0. */
+ BFD_RELOC_D30V_9_PCREL,
+
+/* This is a 6-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_9_PCREL_R,
+
+/* This is a 12-bit absolute reloc with the
right 3 bitsassumed to be 0. */
BFD_RELOC_D30V_15,
-/* Mitsubishi D30V relocs.
-This is a 12-bit pc-relative reloc with
+/* This is a 12-bit pc-relative reloc with
the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_15_PCREL,
+/* This is a 12-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_15_PCREL_R,
+
/* This is an 18-bit absolute reloc with
the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_21,
the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_21_PCREL,
+/* This is an 18-bit pc-relative reloc with
+the right 3 bits assumed to be 0. Same
+as the previous reloc but on the right side
+of the container. */
+ BFD_RELOC_D30V_21_PCREL_R,
+
/* This is a 32-bit absolute reloc. */
BFD_RELOC_D30V_32,
BFD_RELOC_D30V_32_PCREL,
/* end-sanitize-d30v */
-/* start-sanitize-m32r */
/* Mitsubishi M32R relocs.
This is a 24 bit absolute address. */
/* This is a 16-bit reloc containing the small data area offset for use in
add3, load, and store instructions. */
BFD_RELOC_M32R_SDA16,
-/* end-sanitize-m32r */
-
-/* start-sanitize-v850 */
/* This is a 9-bit reloc */
BFD_RELOC_V850_9_PCREL,
/* This is a 22-bit reloc */
BFD_RELOC_V850_22_PCREL,
-/* This is an offset from the short data area pointer.. */
- BFD_RELOC_V850_SDA_OFFSET,
+/* This is a 16 bit offset from the short data area pointer. */
+ BFD_RELOC_V850_SDA_16_16_OFFSET,
+
+/* This is a 16 bit offset (of which only 15 bits are used) from the
+short data area pointer. */
+ BFD_RELOC_V850_SDA_15_16_OFFSET,
+
+/* This is a 16 bit offset from the zero data area pointer. */
+ BFD_RELOC_V850_ZDA_16_16_OFFSET,
+
+/* This is a 16 bit offset (of which only 15 bits are used) from the
+zero data area pointer. */
+ BFD_RELOC_V850_ZDA_15_16_OFFSET,
+
+/* This is an 8 bit offset (of which only 6 bits are used) from the
+tiny data area pointer. */
+ BFD_RELOC_V850_TDA_6_8_OFFSET,
+
+/* This is an 8bit offset (of which only 7 bits are used) from the tiny
+data area pointer. */
+ BFD_RELOC_V850_TDA_7_8_OFFSET,
+
+/* This is a 7 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_7_7_OFFSET,
+
+/* This is a 16 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_16_16_OFFSET,
+/* start-sanitize-v850e */
+
+/* This is a 5 bit offset (of which only 4 bits are used) from the tiny
+data area pointer. */
+ BFD_RELOC_V850_TDA_4_5_OFFSET,
+
+/* This is a 4 bit offset from the tiny data area pointer. */
+ BFD_RELOC_V850_TDA_4_4_OFFSET,
+
+/* This is a 16 bit offset from the short data area pointer, with the
+bits placed non-contigously in the instruction. */
+ BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET,
+
+/* This is a 16 bit offset from the zero data area pointer, with the
+bits placed non-contigously in the instruction. */
+ BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET,
-/* This is an offset from the zero data area pointer.. */
- BFD_RELOC_V850_ZDA_OFFSET,
+/* This is a 6 bit offset from the call table base pointer. */
+ BFD_RELOC_V850_CALLT_6_7_OFFSET,
-/* This is an offset from the tiny data area pointer.. */
- BFD_RELOC_V850_TDA_OFFSET,
-/* end-sanitize-v850 */
+/* This is a 16 bit offset from the call table base pointer. */
+ BFD_RELOC_V850_CALLT_16_16_OFFSET,
+/* end-sanitize-v850e */
/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
projects / deliverable / binutils-gdb.git / blobdiff