/* BFD back-end for ARM COFF files.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001
+ 2000, 2001, 2002
Free Software Foundation, Inc.
Written by Cygnus Support.
PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
static bfd_reloc_status_type aoutarm_fix_pcrel_26
PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
+#ifndef ARM_WINCE
static bfd_reloc_status_type coff_thumb_pcrel_23
PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
-static bfd_reloc_status_type coff_thumb_pcrel_12
- PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
static bfd_reloc_status_type coff_thumb_pcrel_9
PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
+static insn32 insert_thumb_branch
+ PARAMS ((insn32, int));
+#endif
+static bfd_reloc_status_type coff_thumb_pcrel_12
+ PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
static bfd_reloc_status_type coff_arm_reloc
PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
static boolean coff_arm_adjust_symndx
PARAMS ((bfd *, bfd_reloc_code_real_type));
static struct bfd_link_hash_table * coff_arm_link_hash_table_create
PARAMS ((bfd *));
-static insn32 insert_thumb_branch
- PARAMS ((insn32, int));
static struct coff_link_hash_entry * find_thumb_glue
PARAMS ((struct bfd_link_info *, const char *, bfd *));
static struct coff_link_hash_entry * find_arm_glue
#ifndef COFF_IMAGE_WITH_PE
static void record_arm_to_thumb_glue
PARAMS ((struct bfd_link_info *, struct coff_link_hash_entry *));
+#ifndef ARM_WINCE
static void record_thumb_to_arm_glue
PARAMS ((struct bfd_link_info *, struct coff_link_hash_entry *));
#endif
+#endif
static boolean coff_arm_merge_private_bfd_data
PARAMS ((bfd *, bfd *));
static boolean coff_arm_print_private_bfd_data
return flag;
}
+#ifndef ARM_WINCE
static bfd_reloc_status_type
coff_thumb_pcrel_23 (abfd, reloc_entry, symbol, data, input_section,
output_bfd, error_message)
}
static bfd_reloc_status_type
-coff_thumb_pcrel_12 (abfd, reloc_entry, symbol, data, input_section,
+coff_thumb_pcrel_9 (abfd, reloc_entry, symbol, data, input_section,
output_bfd, error_message)
bfd *abfd;
arelent *reloc_entry;
{
return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message,
- b12);
+ b9);
}
+#endif /* not ARM_WINCE */
static bfd_reloc_status_type
-coff_thumb_pcrel_9 (abfd, reloc_entry, symbol, data, input_section,
+coff_thumb_pcrel_12 (abfd, reloc_entry, symbol, data, input_section,
output_bfd, error_message)
bfd *abfd;
arelent *reloc_entry;
{
return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message,
- b9);
+ b12);
}
static const struct reloc_howto_struct *
#define BADMAG(x) ARMBADMAG(x)
#define ARM 1 /* Customize coffcode.h */
+#ifndef ARM_WINCE
+/* Make sure that the 'r_offset' field is copied properly
+ so that identical binaries will compare the same. */
+#define SWAP_IN_RELOC_OFFSET H_GET_32
+#define SWAP_OUT_RELOC_OFFSET H_PUT_32
+#endif
+
/* Extend the coff_link_hash_table structure with a few ARM specific fields.
This allows us to store global data here without actually creating any
global variables, which is a no-no in the BFD world. */
struct coff_arm_link_hash_table * ret;
bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);
- ret = (struct coff_arm_link_hash_table *) bfd_alloc (abfd, amt);
+ ret = (struct coff_arm_link_hash_table *) bfd_malloc (amt);
if (ret == (struct coff_arm_link_hash_table *) NULL)
return NULL;
if (! _bfd_coff_link_hash_table_init
(& ret->root, abfd, _bfd_coff_link_hash_newfunc))
{
- bfd_release (abfd, ret);
+ free (ret);
return (struct bfd_link_hash_table *) NULL;
}
}
\f
+#ifndef ARM_WINCE
/* The thumb form of a long branch is a bit finicky, because the offset
encoding is split over two fields, each in it's own instruction. They
can occur in any order. So given a thumb form of long branch, and an
return br_insn;
}
+
\f
static struct coff_link_hash_entry *
find_thumb_glue (info, name, input_bfd)
return myh;
}
+#endif /* not ARM_WINCE */
static struct coff_link_hash_entry *
find_arm_glue (info, name, input_bfd)
|| signed_check < reloc_signed_min)
overflow = true;
- /* For the BLX(1) instruction remove bit 0 of the adjusted offset.
- Bit 0 can only be set if the upper insn is at a half-word boundary,
- since the destination address, an ARM instruction, must always be
- on a word boundary. The semantics of the BLX (1) instruction,
- however, are that bit 0 in the offset must always be 0, and the
- corresponding bit 1 in the target address will be set from bit
- 1 of the source address. */
- if ((x & 0x18000000) == 0x08000000)
- relocation &= ~0x2;
-
- /* Put the relocation into the correct bits. */
+ /* Put the relocation into the correct bits.
+ For a BLX instruction, make sure that the relocation is rounded up
+ to a word boundary. This follows the semantics of the instruction
+ which specifies that bit 1 of the target address will come from bit
+ 1 of the base address. */
if (bfd_big_endian (input_bfd))
- relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
+ {
+ if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
+ relocation += 2;
+ relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
+ }
else
- relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
+ {
+ if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
+ relocation += 2;
+ relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
+ }
/* Add the relocation to the correct bits of X. */
x = ((x & ~howto->dst_mask) | relocation);
register asection * s;
char * tmp_name;
struct coff_link_hash_entry * myh;
+ struct bfd_link_hash_entry * bh;
struct coff_arm_link_hash_table * globals;
bfd_vma val;
bfd_size_type amt;
though the section isn't allocated yet, this is where we will be putting
it. */
+ bh = NULL;
val = globals->arm_glue_size + 1;
bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
- BSF_GLOBAL, s, val, NULL, true, false,
- (struct bfd_link_hash_entry **) & myh);
+ BSF_GLOBAL, s, val, NULL, true, false, &bh);
free (tmp_name);
return;
}
+#ifndef ARM_WINCE
static void
record_thumb_to_arm_glue (info, h)
struct bfd_link_info * info;
register asection * s;
char * tmp_name;
struct coff_link_hash_entry * myh;
+ struct bfd_link_hash_entry * bh;
struct coff_arm_link_hash_table * globals;
bfd_vma val;
bfd_size_type amt;
return; /* we've already seen this guy */
}
+ bh = NULL;
val = globals->thumb_glue_size + 1;
bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
- BSF_GLOBAL, s, val, NULL, true, false,
- (struct bfd_link_hash_entry **) &myh);
+ BSF_GLOBAL, s, val, NULL, true, false, &bh);
/* If we mark it 'thumb', the disassembler will do a better job. */
+ myh = (struct coff_link_hash_entry *) bh;
myh->class = C_THUMBEXTFUNC;
free (tmp_name);
sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name);
- myh = NULL;
+ bh = NULL;
val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4);
bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
- BSF_LOCAL, s, val, NULL, true, false,
- (struct bfd_link_hash_entry **) & myh);
+ BSF_LOCAL, s, val, NULL, true, false, &bh);
free (tmp_name);
return;
}
+#endif /* not ARM_WINCE */
/* Select a BFD to be used to hold the sections used by the glue code.
This function is called from the linker scripts in ld/emultempl/
{
_bfd_error_handler
/* xgettext: c-format */
- (_("%s: ERROR: compiled for APCS-%d whereas target %s uses APCS-%d"),
+ (_("ERROR: %s is compiled for APCS-%d, whereas %s is compiled for APCS-%d"),
bfd_archive_filename (ibfd), APCS_26_FLAG (ibfd) ? 26 : 32,
bfd_get_filename (obfd), APCS_26_FLAG (obfd) ? 26 : 32
);
if (APCS_FLOAT_FLAG (ibfd))
/* xgettext: c-format */
- msg = _("%s: ERROR: passes floats in float registers whereas target %s uses integer registers");
+ msg = _("ERROR: %s passes floats in float registers, whereas %s passes them in integer registers");
else
/* xgettext: c-format */
- msg = _("%s: ERROR: passes floats in integer registers whereas target %s uses float registers");
+ msg = _("ERROR: %s passes floats in integer registers, whereas %s passes them in float registers");
_bfd_error_handler (msg, bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
if (PIC_FLAG (ibfd))
/* xgettext: c-format */
- msg = _("%s: ERROR: compiled as position independent code, whereas target %s is absolute position");
+ msg = _("ERROR: %s is compiled as position independent code, whereas target %s is absolute position");
else
/* xgettext: c-format */
- msg = _("%s: ERROR: compiled as absolute position code, whereas target %s is position independent");
+ msg = _("ERROR: %s is compiled as absolute position code, whereas target %s is position independent");
_bfd_error_handler (msg, bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
if (INTERWORK_FLAG (ibfd))
/* xgettext: c-format */
- msg = _("Warning: %s supports interworking, whereas %s does not.");
+ msg = _("Warning: %s supports interworking, whereas %s does not");
else
/* xgettext: c-format */
- msg = _("Warning: %s does not support interworking, whereas %s does.");
+ msg = _("Warning: %s does not support interworking, whereas %s does");
_bfd_error_handler (msg, bfd_archive_filename (ibfd),
bfd_get_filename (obfd));