/* BFD back-end for Hitachi Super-H COFF binaries.
- Copyright 1993, 94, 95, 96, 97, 98, 1999, 2000 Free Software Foundation, Inc.
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
+ Free Software Foundation, Inc.
Contributed by Cygnus Support.
Written by Steve Chamberlain, <sac@cygnus.com>.
Relaxing code written by Ian Lance Taylor, <ian@cygnus.com>.
#include "coff/pe.h"
#ifndef COFF_IMAGE_WITH_PE
-static boolean sh_align_load_span
+static boolean sh_align_load_span
PARAMS ((bfd *, asection *, bfd_byte *,
boolean (*) (bfd *, asection *, PTR, bfd_byte *, bfd_vma),
PTR, bfd_vma **, bfd_vma *, bfd_vma, bfd_vma, boolean *));
reloc_howto_type * howto;
{
return ! howto->pc_relative && howto->type != R_SH_IMAGEBASE;
-}
+}
#endif
/* The supported relocations. There are a lot of relocations defined
EMPTY_HOWTO (15),
#ifdef COFF_WITH_PE
- HOWTO (R_SH_IMAGEBASE, /* type */
- 0, /* rightshift */
- 2, /* size (0 = byte, 1 = short, 2 = long) */
- 32, /* bitsize */
- false, /* pc_relative */
- 0, /* bitpos */
+ HOWTO (R_SH_IMAGEBASE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
- sh_reloc, /* special_function */
- "rva32", /* name */
- true, /* partial_inplace */
- 0xffffffff, /* src_mask */
- 0xffffffff, /* dst_mask */
+ sh_reloc, /* special_function */
+ "rva32", /* name */
+ true, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
false), /* pcrel_offset */
#else
EMPTY_HOWTO (16), /* R_SH_IMM8 */
/* Get the value of a symbol, when performing a relocation. */
static long
-get_symbol_value (symbol)
+get_symbol_value (symbol)
asymbol *symbol;
-{
+{
bfd_vma relocation;
if (bfd_is_com_section (symbol->section))
- relocation = 0;
- else
+ relocation = 0;
+ else
relocation = (symbol->value +
symbol->section->output_section->vma +
symbol->section->output_offset);
align load and store instructions on four byte boundaries if we
can, by swapping them with one of the adjacent instructions. */
-static boolean
+static boolean
sh_relax_section (abfd, sec, link_info, again)
bfd *abfd;
asection *sec;
return op;
}
- return NULL;
+ return NULL;
}
/* See whether an instruction uses or sets a general purpose register */
of a double precision value.
So what this all boils down to is that we have to ignore the lowest
bit of the register number. */
-
+
if ((f & USESF1) != 0
&& (USESF1_REG (insn) & 0xe) == (freg & 0xe))
return true;
of a double precision value.
So what this all boils down to is that we have to ignore the lowest
bit of the register number. */
-
+
if ((f & SETSF1) != 0
&& (SETSF1_REG (insn) & 0xe) == (freg & 0xe))
return true;
if (dsp && i - 2 > start)
{
unsigned pprev_insn = bfd_get_16 (abfd, contents + i - 4);
-
+
if ((pprev_insn & 0xfc00) == 0xf800)
prev_op = NULL;
else
sym = NULL;
}
else
- {
+ {
if (symndx < 0
|| (unsigned long) symndx >= obj_raw_syment_count (input_bfd))
{
if (rel->r_type == R_SH_IMAGEBASE)
addend -= pe_data (input_section->output_section->owner)->pe_opthdr.ImageBase;
#endif
-
+
val = 0;
if (h == NULL)
#else
#define TARGET_SYM shlcoff_vec
#endif
-
+
#ifndef TARGET_SHL_NAME
#define TARGET_SHL_NAME "coff-shl"
#endif
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
& shlcoff_small_vec,
-
+
(PTR) &bfd_coff_small_swap_table
};
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
{_bfd_dummy_target, coff_small_object_p, /* bfd_check_format */
- bfd_generic_archive_p, _bfd_dummy_target},
+ bfd_generic_archive_p, _bfd_dummy_target},
{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
bfd_false},
{bfd_false, coff_write_object_contents, /* bfd_write_contents */
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
& shcoff_small_vec,
-
+
(PTR) &bfd_coff_small_swap_table
};
#endif